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https://chromium.googlesource.com/libyuv/libyuv
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Line continuation at end of line with NOLINT before that.
BUG=libyuv:634 TEST=git cl lint TBR=kjellander@chromium.org Review URL: https://codereview.chromium.org/2453013003 .
This commit is contained in:
Frank Barchard
parent
2c94d6bd5a
commit
02ae8b60c5
@ -16,76 +16,75 @@
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#include <msa.h>
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#include <msa.h>
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#if (__mips_isa_rev >= 6)
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#if (__mips_isa_rev >= 6)
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#define LW(psrc) ({ \
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#define LW(psrc) ({ \
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uint8* psrc_lw_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_lw_m = (uint8*) (psrc); /* NOLINT */ \
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uint32 val_m; \
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uint32 val_m; \
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asm volatile ( \
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asm volatile ( \
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"lw %[val_m], %[psrc_lw_m] \n\t" \
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"lw %[val_m], %[psrc_lw_m] \n\t" \
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: [val_m] "=r" (val_m) \
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: [val_m] "=r" (val_m) \
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: [psrc_lw_m] "m" (*psrc_lw_m) \
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: [psrc_lw_m] "m" (*psrc_lw_m) \
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); \
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); \
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\
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val_m; \
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val_m; \
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})
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})
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#if (__mips == 64)
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#if (__mips == 64)
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#define LD(psrc) ({ \
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#define LD(psrc) ({ \
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uint8* psrc_ld_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_ld_m = (uint8*) (psrc); /* NOLINT */ \
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uint64 val_m = 0; \
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uint64 val_m = 0; \
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asm volatile ( \
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asm volatile ( \
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"ld %[val_m], %[psrc_ld_m] \n\t" \
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"ld %[val_m], %[psrc_ld_m] \n\t" \
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: [val_m] "=r" (val_m) \
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: [val_m] "=r" (val_m) \
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: [psrc_ld_m] "m" (*psrc_ld_m) \
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: [psrc_ld_m] "m" (*psrc_ld_m) \
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); \
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); \
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val_m; \
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val_m; \
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})
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})
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#else // !(__mips == 64)
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#else // !(__mips == 64)
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#define LD(psrc) ({ \
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#define LD(psrc) ({ \
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uint8* psrc_ld_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_ld_m = (uint8*) (psrc); /* NOLINT */ \
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uint32 val0_m, val1_m; \
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uint32 val0_m, val1_m; \
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uint64 val_m = 0; \
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uint64 val_m = 0; \
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val0_m = LW(psrc_ld_m); \
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val0_m = LW(psrc_ld_m); \
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val1_m = LW(psrc_ld_m + 4); \
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val1_m = LW(psrc_ld_m + 4); \
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val_m = (uint64) (val1_m); \ /* NOLINT */
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val_m = (uint64) (val1_m); /* NOLINT */ \
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val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); \ /* NOLINT */
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val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); /* NOLINT */ \
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val_m = (uint64) (val_m | (uint64) val0_m); \ /* NOLINT */
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val_m = (uint64) (val_m | (uint64) val0_m); /* NOLINT */ \
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val_m; \
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val_m; \
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})
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})
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#endif // (__mips == 64)
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#endif // (__mips == 64)
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#else // !(__mips_isa_rev >= 6)
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#else // !(__mips_isa_rev >= 6)
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#define LW(psrc) ({ \
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#define LW(psrc) ({ \
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uint8* psrc_lw_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_lw_m = (uint8*) (psrc); /* NOLINT */ \
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uint32 val_m; \
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uint32 val_m; \
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asm volatile ( \
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asm volatile ( \
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"ulw %[val_m], %[psrc_lw_m] \n\t" \
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"ulw %[val_m], %[psrc_lw_m] \n\t" \
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: [val_m] "=r" (val_m) \
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: [val_m] "=r" (val_m) \
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: [psrc_lw_m] "m" (*psrc_lw_m) \
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: [psrc_lw_m] "m" (*psrc_lw_m) \
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); \
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); \
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val_m; \
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val_m; \
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})
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})
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#if (__mips == 64)
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#if (__mips == 64)
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#define LD(psrc) ({ \
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#define LD(psrc) ({ \
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uint8* psrc_ld_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_ld_m = (uint8*) (psrc); /* NOLINT */ \
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uint64 val_m = 0; \
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uint64 val_m = 0; \
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asm volatile ( \
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asm volatile ( \
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"uld %[val_m], %[psrc_ld_m] \n\t" \
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"uld %[val_m], %[psrc_ld_m] \n\t" \
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: [val_m] "=r" (val_m) \
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: [val_m] "=r" (val_m) \
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: [psrc_ld_m] "m" (*psrc_ld_m) \
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: [psrc_ld_m] "m" (*psrc_ld_m) \
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); \
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); \
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val_m; \
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val_m; \
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})
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})
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#else // !(__mips == 64)
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#else // !(__mips == 64)
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#define LD(psrc) ({ \
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#define LD(psrc) ({ \
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uint8* psrc_ld_m = (uint8*) (psrc); \ /* NOLINT */
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uint8* psrc_ld_m = (uint8*) (psrc); /* NOLINT */ \
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uint32 val0_m, val1_m; \
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uint32 val0_m, val1_m; \
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uint64 val_m = 0; \
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uint64 val_m = 0; \
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val0_m = LW(psrc_ld_m); \
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val0_m = LW(psrc_ld_m); \
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val1_m = LW(psrc_ld_m + 4); \
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val1_m = LW(psrc_ld_m + 4); \
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val_m = (uint64) (val1_m); \ /* NOLINT */
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val_m = (uint64) (val1_m); /* NOLINT */ \
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val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); \ /* NOLINT */
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val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); /* NOLINT */ \
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val_m = (uint64) (val_m | (uint64) val0_m); \ /* NOLINT */
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val_m = (uint64) (val_m | (uint64) val0_m); /* NOLINT */ \
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val_m; \
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val_m; \
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})
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})
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#endif // (__mips == 64)
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#endif // (__mips == 64)
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#endif // (__mips_isa_rev >= 6)
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#endif // (__mips_isa_rev >= 6)
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@ -104,15 +103,15 @@
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Details : Load 16 byte elements in 'out0' from (psrc)
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Details : Load 16 byte elements in 'out0' from (psrc)
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Load 16 byte elements in 'out1' from (psrc + stride)
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Load 16 byte elements in 'out1' from (psrc + stride)
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*/
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*/
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#define LD_B2(RTYPE, psrc, stride, out0, out1) { \
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#define LD_B2(RTYPE, psrc, stride, out0, out1) { \
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out0 = LD_B(RTYPE, (psrc)); \
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out0 = LD_B(RTYPE, (psrc)); \
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out1 = LD_B(RTYPE, (psrc) + stride); \
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out1 = LD_B(RTYPE, (psrc) + stride); \
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}
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}
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#define LD_UB2(...) LD_B2(v16u8, __VA_ARGS__)
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#define LD_UB2(...) LD_B2(v16u8, __VA_ARGS__)
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#define LD_B4(RTYPE, psrc, stride, out0, out1, out2, out3) { \
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#define LD_B4(RTYPE, psrc, stride, out0, out1, out2, out3) { \
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LD_B2(RTYPE, (psrc), stride, out0, out1); \
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LD_B2(RTYPE, (psrc), stride, out0, out1); \
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LD_B2(RTYPE, (psrc) + 2 * stride , stride, out2, out3); \
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LD_B2(RTYPE, (psrc) + 2 * stride , stride, out2, out3); \
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}
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}
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#define LD_UB4(...) LD_B4(v16u8, __VA_ARGS__)
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#define LD_UB4(...) LD_B4(v16u8, __VA_ARGS__)
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@ -122,15 +121,15 @@
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Details : Store 16 byte elements from 'in0' to (pdst)
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Details : Store 16 byte elements from 'in0' to (pdst)
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Store 16 byte elements from 'in1' to (pdst + stride)
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Store 16 byte elements from 'in1' to (pdst + stride)
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*/
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*/
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#define ST_B2(RTYPE, in0, in1, pdst, stride) { \
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#define ST_B2(RTYPE, in0, in1, pdst, stride) { \
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ST_B(RTYPE, in0, (pdst)); \
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ST_B(RTYPE, in0, (pdst)); \
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ST_B(RTYPE, in1, (pdst) + stride); \
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ST_B(RTYPE, in1, (pdst) + stride); \
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}
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}
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#define ST_UB2(...) ST_B2(v16u8, __VA_ARGS__)
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#define ST_UB2(...) ST_B2(v16u8, __VA_ARGS__)
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#define ST_B4(RTYPE, in0, in1, in2, in3, pdst, stride) { \
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#define ST_B4(RTYPE, in0, in1, in2, in3, pdst, stride) { \
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ST_B2(RTYPE, in0, in1, (pdst), stride); \
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ST_B2(RTYPE, in0, in1, (pdst), stride); \
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ST_B2(RTYPE, in2, in3, (pdst) + 2 * stride, stride); \
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ST_B2(RTYPE, in2, in3, (pdst) + 2 * stride, stride); \
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}
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}
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#define ST_UB4(...) ST_B4(v16u8, __VA_ARGS__)
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#define ST_UB4(...) ST_B4(v16u8, __VA_ARGS__)
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@ -142,9 +141,9 @@
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Details : Byte elements from 'in0' & 'in1' are copied selectively to
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Details : Byte elements from 'in0' & 'in1' are copied selectively to
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'out0' as per control vector 'mask0'
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'out0' as per control vector 'mask0'
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*/
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*/
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#define VSHF_B2(RTYPE, in0, in1, in2, in3, mask0, mask1, out0, out1) { \
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#define VSHF_B2(RTYPE, in0, in1, in2, in3, mask0, mask1, out0, out1) { \
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out0 = (RTYPE) __msa_vshf_b((v16i8) mask0, (v16i8) in1, (v16i8) in0); \
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out0 = (RTYPE) __msa_vshf_b((v16i8) mask0, (v16i8) in1, (v16i8) in0); \
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out1 = (RTYPE) __msa_vshf_b((v16i8) mask1, (v16i8) in3, (v16i8) in2); \
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out1 = (RTYPE) __msa_vshf_b((v16i8) mask1, (v16i8) in3, (v16i8) in2); \
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}
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}
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#define VSHF_B2_UB(...) VSHF_B2(v16u8, __VA_ARGS__)
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#define VSHF_B2_UB(...) VSHF_B2(v16u8, __VA_ARGS__)
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@ -155,9 +154,9 @@
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Details : Right half of byte elements from 'in0' and 'in1' are
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Details : Right half of byte elements from 'in0' and 'in1' are
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interleaved and written to 'out0'
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interleaved and written to 'out0'
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*/
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*/
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#define ILVRL_B2(RTYPE, in0, in1, out0, out1) { \
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#define ILVRL_B2(RTYPE, in0, in1, out0, out1) { \
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out0 = (RTYPE) __msa_ilvr_b((v16i8) in0, (v16i8) in1); \
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out0 = (RTYPE) __msa_ilvr_b((v16i8) in0, (v16i8) in1); \
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out1 = (RTYPE) __msa_ilvl_b((v16i8) in0, (v16i8) in1); \
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out1 = (RTYPE) __msa_ilvl_b((v16i8) in0, (v16i8) in1); \
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}
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}
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#define ILVRL_B2_UB(...) ILVRL_B2(v16u8, __VA_ARGS__)
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#define ILVRL_B2_UB(...) ILVRL_B2(v16u8, __VA_ARGS__)
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