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https://chromium.googlesource.com/libyuv/libyuv
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YUY2 for AVX2
BUG=none TEST=none Review URL: https://webrtc-codereview.appspot.com/887006 git-svn-id: http://libyuv.googlecode.com/svn/trunk@424 16f28f9a-4ce2-e073-06de-1de4eb20be90
This commit is contained in:
fbarchard@google.com
parent
0908a701e9
commit
02e48bf72b
@ -1,6 +1,6 @@
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Name: libyuv
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URL: http://code.google.com/p/libyuv/
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Version: 423
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Version: 424
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License: BSD
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License File: LICENSE
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@ -11,6 +11,6 @@
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#ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT
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#define INCLUDE_LIBYUV_VERSION_H_
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#define LIBYUV_VERSION 423
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#define LIBYUV_VERSION 424
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#endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT
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61
source/row_x86.asm
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61
source/row_x86.asm
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;*
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;* Copyright 2012 The LibYuv Project Authors. All rights reserved.
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;*
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;* Use of this source code is governed by a BSD-style license
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;* that can be found in the LICENSE file in the root of the source
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;* tree. An additional intellectual property rights grant can be found
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;* in the file PATENTS. All contributing project authors may
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;* be found in the AUTHORS file in the root of the source tree.
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;*
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%include "x86inc.asm"
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SECTION .text
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; void YUY2ToYRow_SSE2(const uint8* src_yuy2,
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; uint8* dst_y, int pix);
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%macro YUY2TOYROW 2-3
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cglobal %1ToYRow%3, 3, 3, 3, src_yuy2, dst_y, pix
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%ifidn %1,YUY2
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pcmpeqb m2, m2 ; generate mask 0x00ff00ff
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psrlw m2, 8
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%endif
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ALIGN 16
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.convertloop:
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mov%2 m0, [src_yuy2q]
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mov%2 m1, [src_yuy2q + mmsize]
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lea src_yuy2q, [src_yuy2q + mmsize * 2]
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%ifidn %1,YUY2
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pand m0, m2 ; YUY2 even bytes are Y
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pand m1, m2
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%else
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psrlw m0, 8 ; UYVY odd bytes are Y
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psrlw m1, 8
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%endif
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packuswb m0, m1
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sub pixd, mmsize
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mov%2 [dst_yq], m0
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lea dst_yq, [dst_yq + mmsize]
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jg .convertloop
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RET
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%endmacro
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; TODO(fbarchard): Remove MMX when SSE2 is required.
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INIT_MMX MMX
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YUY2TOYROW YUY2,a,
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YUY2TOYROW YUY2,u,_Unaligned
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YUY2TOYROW UYVY,a,
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YUY2TOYROW UYVY,u,_Unaligned
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INIT_XMM SSE2
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YUY2TOYROW YUY2,a,
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YUY2TOYROW YUY2,u,_Unaligned
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YUY2TOYROW UYVY,a,
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YUY2TOYROW UYVY,u,_Unaligned
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INIT_YMM AVX2
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YUY2TOYROW YUY2,a,
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YUY2TOYROW YUY2,u,_Unaligned
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YUY2TOYROW UYVY,a,
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YUY2TOYROW UYVY,u,_Unaligned
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@ -34,7 +34,9 @@
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; as this feature might be useful for others as well. Send patches or ideas
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; to x264-devel@videolan.org .
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%define program_name x264
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; Local changes for libyuv:
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; remove %define program_name and references in labels
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; rename cpus to uppercase
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%define WIN64 0
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%define UNIX64 0
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@ -505,7 +507,7 @@ DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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%endmacro
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%macro cglobal_internal 1-2+
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%ifndef cglobaled_%1
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%xdefine %1 mangle(program_name %+ _ %+ %1)
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%xdefine %1 mangle(%1)
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%xdefine %1.skip_prologue %1 %+ .skip_prologue
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CAT_XDEFINE cglobaled_, %1, 1
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%endif
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@ -525,7 +527,7 @@ DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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%endmacro
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%macro cextern 1
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%xdefine %1 mangle(program_name %+ _ %+ %1)
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%xdefine %1 mangle(%1)
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CAT_XDEFINE cglobaled_, %1, 1
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extern %1
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%endmacro
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@ -538,7 +540,7 @@ DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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%endmacro
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%macro const 2+
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%xdefine %1 mangle(program_name %+ _ %+ %1)
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%xdefine %1 mangle(%1)
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global %1
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%1: %2
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%endmacro
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@ -551,22 +553,22 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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; cpuflags
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%assign cpuflags_mmx (1<<0)
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%assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
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%assign cpuflags_3dnow (1<<2) | cpuflags_mmx
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%assign cpuflags_MMX (1<<0)
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%assign cpuflags_MMX2 (1<<1) | cpuflags_MMX
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%assign cpuflags_3dnow (1<<2) | cpuflags_MMX
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%assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
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%assign cpuflags_sse (1<<4) | cpuflags_mmx2
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%assign cpuflags_sse2 (1<<5) | cpuflags_sse
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%assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
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%assign cpuflags_sse3 (1<<7) | cpuflags_sse2
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%assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
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%assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
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%assign cpuflags_sse42 (1<<10)| cpuflags_sse4
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%assign cpuflags_avx (1<<11)| cpuflags_sse42
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%assign cpuflags_xop (1<<12)| cpuflags_avx
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%assign cpuflags_fma4 (1<<13)| cpuflags_avx
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%assign cpuflags_avx2 (1<<14)| cpuflags_avx
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%assign cpuflags_fma3 (1<<15)| cpuflags_avx
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%assign cpuflags_SSE (1<<4) | cpuflags_MMX2
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%assign cpuflags_SSE2 (1<<5) | cpuflags_SSE
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%assign cpuflags_SSE2slow (1<<6) | cpuflags_SSE2
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%assign cpuflags_SSE3 (1<<7) | cpuflags_SSE2
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%assign cpuflags_SSSE3 (1<<8) | cpuflags_SSE3
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%assign cpuflags_SSE4 (1<<9) | cpuflags_SSSE3
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%assign cpuflags_SSE42 (1<<10)| cpuflags_SSE4
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%assign cpuflags_AVX (1<<11)| cpuflags_SSE42
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%assign cpuflags_xop (1<<12)| cpuflags_AVX
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%assign cpuflags_fma4 (1<<13)| cpuflags_AVX
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%assign cpuflags_AVX2 (1<<14)| cpuflags_AVX
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%assign cpuflags_fma3 (1<<15)| cpuflags_AVX
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%assign cpuflags_cache32 (1<<16)
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%assign cpuflags_cache64 (1<<17)
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@ -594,17 +596,17 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%assign cpuflags cpuflags | cpuflags_%2
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%endif
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%xdefine SUFFIX _ %+ cpuname
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%if cpuflag(avx)
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%assign avx_enabled 1
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%if cpuflag(AVX)
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%assign AVX_enabled 1
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%endif
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%if mmsize == 16 && notcpuflag(sse2)
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%if mmsize == 16 && notcpuflag(SSE2)
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%define mova movaps
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%define movu movups
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%define movnta movntps
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%endif
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%if cpuflag(aligned)
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%define movu mova
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%elifidn %1, sse3
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%elifidn %1, SSE3
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%define movu lddqu
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%endif
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%else
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@ -614,7 +616,7 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%endif
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%endmacro
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; merge mmx and sse*
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; merge MMX and SSE*
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%macro CAT_XDEFINE 3
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%xdefine %1%2 %3
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@ -625,7 +627,7 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%endmacro
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%macro INIT_MMX 0-1+
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%assign avx_enabled 0
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%assign AVX_enabled 0
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%define RESET_MM_PERMUTATION INIT_MMX %1
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%define mmsize 8
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%define num_mmregs 8
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@ -648,7 +650,7 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%endmacro
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%macro INIT_XMM 0-1+
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%assign avx_enabled 0
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%assign AVX_enabled 0
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%define RESET_MM_PERMUTATION INIT_XMM %1
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%define mmsize 16
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%define num_mmregs 8
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@ -669,7 +671,7 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%endmacro
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%macro INIT_YMM 0-1+
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%assign avx_enabled 1
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%assign AVX_enabled 1
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%define RESET_MM_PERMUTATION INIT_YMM %1
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%define mmsize 32
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%define num_mmregs 8
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@ -832,7 +834,7 @@ INIT_XMM
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%xdefine %%dst %2
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%rep %0-2
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%ifidn %%dst, %3
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%error non-avx emulation of ``%%opcode'' is not supported
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%error non-AVX emulation of ``%%opcode'' is not supported
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%endif
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%rotate 1
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%endrep
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@ -868,7 +870,7 @@ INIT_XMM
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%if %4>=3+%3
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%ifnidn %5, %6
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%if avx_enabled && %%sizeofreg==16
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%if AVX_enabled && %%sizeofreg==16
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v%1 %5, %6, %7
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%else
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CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7
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@ -891,7 +893,7 @@ INIT_XMM
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; So, if the op is symmetric and the wrong one is memory, swap them.
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%macro RUN_AVX_INSTR1 8
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%assign %%swap 0
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%if avx_enabled
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%if AVX_enabled
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%ifnid %6
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%assign %%swap 1
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%endif
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