From 10d9c0d0a7be3c0c96629be4d3d96f5bd7826aeb Mon Sep 17 00:00:00 2001 From: "fbarchard@google.com" Date: Mon, 10 Nov 2014 19:19:12 +0000 Subject: [PATCH] MergeUV for AVX2 ported to gcc. Add missing vzeroupper to all avx2 functions. BUG=none TESTED=ncval for nacl R=brucedawson@google.com, harryjin@google.com Review URL: https://webrtc-codereview.appspot.com/25059005 git-svn-id: http://libyuv.googlecode.com/svn/trunk@1157 16f28f9a-4ce2-e073-06de-1de4eb20be90 --- README.chromium | 2 +- include/libyuv/row.h | 4 +-- include/libyuv/version.h | 2 +- source/row_posix.cc | 65 ++++++++++++++++++++++++++++++++-------- 4 files changed, 57 insertions(+), 16 deletions(-) diff --git a/README.chromium b/README.chromium index 4fb2628e5..9852a988f 100644 --- a/README.chromium +++ b/README.chromium @@ -1,6 +1,6 @@ Name: libyuv URL: http://code.google.com/p/libyuv/ -Version: 1155 +Version: 1157 License: BSD License File: LICENSE diff --git a/include/libyuv/row.h b/include/libyuv/row.h index ada916cef..818d32c5b 100644 --- a/include/libyuv/row.h +++ b/include/libyuv/row.h @@ -198,6 +198,8 @@ extern "C" { #define HAS_UYVYTOYROW_AVX2 #define HAS_UYVYTOUV422ROW_AVX2 #define HAS_UYVYTOUVROW_AVX2 +#define HAS_SPLITUVROW_AVX2 +#define HAS_MERGEUVROW_AVX2 #endif // The following are require VS2012. @@ -210,9 +212,7 @@ extern "C" { #define HAS_I422TORGBAROW_AVX2 #define HAS_I422TOABGRROW_AVX2 #define HAS_INTERPOLATEROW_AVX2 -#define HAS_MERGEUVROW_AVX2 #define HAS_MIRRORROW_AVX2 -#define HAS_SPLITUVROW_AVX2 // Effects: #define HAS_ARGBADDROW_AVX2 diff --git a/include/libyuv/version.h b/include/libyuv/version.h index 0f3a3cd36..36a2f8e56 100644 --- a/include/libyuv/version.h +++ b/include/libyuv/version.h @@ -11,6 +11,6 @@ #ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT #define INCLUDE_LIBYUV_VERSION_H_ -#define LIBYUV_VERSION 1155 +#define LIBYUV_VERSION 1157 #endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT diff --git a/source/row_posix.cc b/source/row_posix.cc index 3ea34f4e0..b53c93abf 100644 --- a/source/row_posix.cc +++ b/source/row_posix.cc @@ -2104,6 +2104,7 @@ void I422ToBGRARow_AVX2(const uint8* y_buf, "lea " MEMLEA(0x80, [dst_bgra]) ", %[dst_bgra] \n" // dst_bgra += 128 "sub $0x20, %[width] \n" // width -= 32 "jg 1b \n" + "vzeroupper \n" : [y_buf]"+r"(y_buf), // %[y_buf] [u_buf]"+r"(u_buf), // %[u_buf] [v_buf]"+r"(v_buf), // %[v_buf] @@ -2122,7 +2123,6 @@ void I422ToBGRARow_AVX2(const uint8* y_buf, } #endif // HAS_I422ToBGRAROW_AVX2 - #ifdef HAS_YTOARGBROW_SSE2 void YToARGBRow_SSE2(const uint8* y_buf, uint8* dst_argb, @@ -2314,27 +2314,28 @@ void ARGBMirrorRow_SSSE3(const uint8* src, uint8* dst, int width) { #ifdef HAS_SPLITUVROW_AVX2 void SplitUVRow_AVX2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, int pix) { asm volatile ( - "pcmpeqb %%ymm5,%%ymm5 \n" - "psrlw $0x8,%%ymm5 \n" + "vpcmpeqb %%ymm5,%%ymm5,%%ymm5 \n" + "vpsrlw $0x8,%%ymm5,%%ymm5 \n" "sub %1,%2 \n" LABELALIGN "1: \n" "vmovdqu " MEMACCESS(0) ",%%ymm0 \n" "vmovdqu " MEMACCESS2(0x20,0) ",%%ymm1 \n" "lea " MEMLEA(0x40,0) ",%0 \n" - "vpsrlw $0x8,%%ymm0,%%ymm2 \n" - "vpsrlw $0x8,%%ymm1,%%ymm3 \n" - "vpand %%ymm5,%%ymm0,%%ymm0 \n" - "vpand %%ymm5,%%ymm1,%%ymm1 \n" - "vpackuswb %%ymm1,%%ymm0,%%ymm0 \n" - "vpackuswb %%ymm3,%%ymm2,%%ymm2 \n" - "vpermq $0xd8,%%ymm0,%%ymm0 \n" - "vpermq $0xd8,%%ymm2,%%ymm2 \n" + "vpsrlw $0x8,%%ymm0,%%ymm2 \n" + "vpsrlw $0x8,%%ymm1,%%ymm3 \n" + "vpand %%ymm5,%%ymm0,%%ymm0 \n" + "vpand %%ymm5,%%ymm1,%%ymm1 \n" + "vpackuswb %%ymm1,%%ymm0,%%ymm0 \n" + "vpackuswb %%ymm3,%%ymm2,%%ymm2 \n" + "vpermq $0xd8,%%ymm0,%%ymm0 \n" + "vpermq $0xd8,%%ymm2,%%ymm2 \n" "vmovdqu %%ymm0," MEMACCESS(1) " \n" MEMOPMEM(vmovdqu,ymm2,0x00,1,2,1) // vmovdqu %%ymm2,(%1,%2) "lea " MEMLEA(0x20,1) ",%1 \n" "sub $0x20,%3 \n" "jg 1b \n" + "vzeroupper \n" : "+r"(src_uv), // %0 "+r"(dst_u), // %1 "+r"(dst_v), // %2 @@ -2391,6 +2392,45 @@ void SplitUVRow_SSE2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, int pix) { } #endif // HAS_SPLITUVROW_SSE2 +// TODO(fbarchard): Consider vpunpcklbw, vpunpckhbw, store-low1, store-low2, +// extract-high1, extract-high2. +#ifdef HAS_MERGEUVROW_AVX2 +void MergeUVRow_AVX2(const uint8* src_u, const uint8* src_v, uint8* dst_uv, + int width) { + asm volatile ( + "sub %0,%1 \n" + LABELALIGN + "1: \n" + "vmovdqu " MEMACCESS(0) ",%%ymm0 \n" + MEMOPREG(vmovdqu,0x00,0,1,1,ymm1) // vmovdqu (%0,%1,1),%%ymm1 + "lea " MEMLEA(0x20,0) ",%0 \n" + + "vpunpcklbw %%ymm1,%%ymm0,%%ymm2 \n" + "vpunpckhbw %%ymm1,%%ymm0,%%ymm0 \n" + "vperm2i128 $0x20,%%ymm0,%%ymm2,%%ymm1 \n" + "vperm2i128 $0x31,%%ymm0,%%ymm2,%%ymm2 \n" + "vmovdqu %%ymm1," MEMACCESS(2) " \n" + "vmovdqu %%ymm2," MEMACCESS2(0x20,2) " \n" + "lea " MEMLEA(0x40,2) ",%2 \n" + "sub $0x20,%3 \n" + "jg 1b \n" + "vzeroupper \n" + : "+r"(src_u), // %0 + "+r"(src_v), // %1 + "+r"(dst_uv), // %2 + "+r"(width) // %3 + : + : "memory", "cc" +#if defined(__native_client__) && defined(__x86_64__) + , "r14" +#endif +#if defined(__SSE2__) + , "xmm0", "xmm1", "xmm2" +#endif + ); +} +#endif // HAS_MERGEUVROW_AVX2 + #ifdef HAS_MERGEUVROW_SSE2 void MergeUVRow_SSE2(const uint8* src_u, const uint8* src_v, uint8* dst_uv, int width) { @@ -2911,6 +2951,7 @@ void YUY2ToYRow_AVX2(const uint8* src_yuy2, uint8* dst_y, int pix) { "vmovdqu %%ymm0," MEMACCESS(1) " \n" "lea " MEMLEA(0x20,1) ",%1 \n" "jg 1b \n" + "vzeroupper \n" : "+r"(src_yuy2), // %0 "+r"(dst_y), // %1 "+r"(pix) // %2 @@ -2922,7 +2963,6 @@ void YUY2ToYRow_AVX2(const uint8* src_yuy2, uint8* dst_y, int pix) { ); } - void YUY2ToUVRow_AVX2(const uint8* src_yuy2, int stride_yuy2, uint8* dst_u, uint8* dst_v, int pix) { asm volatile ( @@ -4853,6 +4893,7 @@ void ARGBShuffleRow_AVX2(const uint8* src_argb, uint8* dst_argb, "vmovdqu %%ymm1," MEMACCESS2(0x20,1) " \n" "lea " MEMLEA(0x40,1) ",%1 \n" "jg 1b \n" + "vzeroupper \n" : "+r"(src_argb), // %0 "+r"(dst_argb), // %1 "+r"(pix) // %2