From 1dac06e8c0442c466b431935a2e385ea07796689 Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Fri, 14 Aug 2026 12:30:42 -0700 Subject: [PATCH] Fix ARM NEON and SVE2 register constraints for ARGBToRGB565DitherRow - Add register z2 to the inline assembly clobber list in ARGBToRGB565DitherRow_SVE2. - Fix operand constraints and register indexes for src_argb, dst_rgb, and width in ARGBToRGB565DitherRow_NEON to properly use '+r' for modified operands. Bug: None Change-Id: I521c5b37dc37e2bcbe910f72c389144b1491e9dc Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8261579 Commit-Queue: Frank Barchard Reviewed-by: Wan-Teh Chang --- source/row_neon.cc | 16 ++++++++-------- source/row_sve.cc | 2 +- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/source/row_neon.cc b/source/row_neon.cc index 160c7b2b4..9afb2cd1a 100644 --- a/source/row_neon.cc +++ b/source/row_neon.cc @@ -1769,20 +1769,20 @@ void ARGBToRGB565DitherRow_NEON(const uint8_t* src_argb, uint32_t dither4, int width) { asm volatile( - "vdup.32 d7, %2 \n" // dither4 + "vdup.32 d7, %3 \n" // dither4 "1: \n" - "vld4.8 {d0, d2, d4, d6}, [%1]! \n" // load 8 pixels of ARGB. - "subs %3, %3, #8 \n" // 8 processed per loop. + "vld4.8 {d0, d2, d4, d6}, [%0]! \n" // load 8 pixels of ARGB. + "subs %2, %2, #8 \n" // 8 processed per loop. "vqadd.u8 d0, d0, d7 \n" "vqadd.u8 d2, d2, d7 \n" "vqadd.u8 d4, d4, d7 \n" // add for dither ARGBTORGB565 - "vst1.8 {q2}, [%0]! \n" // store 8 RGB565. + "vst1.8 {q2}, [%1]! \n" // store 8 RGB565. "bgt 1b \n" - : "+r"(dst_rgb) // %0 - : "r"(src_argb), // %1 - "r"(dither4), // %2 - "r"(width) // %3 + : "+r"(src_argb), // %0 + "+r"(dst_rgb), // %1 + "+r"(width) // %2 + : "r"(dither4) // %3 : "cc", "memory", "q0", "q1", "q2", "q3"); } diff --git a/source/row_sve.cc b/source/row_sve.cc index 7c389ecc0..e6e2d1d4a 100644 --- a/source/row_sve.cc +++ b/source/row_sve.cc @@ -338,7 +338,7 @@ void ARGBToRGB565DitherRow_SVE2(const uint8_t* src_argb, [vl] "=&r"(vl) // %[vl] : [bsl_mask] "r"(bsl_mask), // %[bsl_mask] [dither4] "r"(dither4) // %[dither4] - : "cc", "memory", "z0", "z1", "z3", "z4", "p0"); + : "cc", "memory", "z0", "z1", "z2", "z3", "z4", "p0"); } #define ARGB1555TOARGB \