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https://chromium.googlesource.com/libyuv/libyuv
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I422ToRGB24Row_AVX512VBMI handle tail with mask
I422ToRGB24Matrix (299x299, repeat=10000) ==================================================================== CPU Before After Improvement -------------------------------------------------------------------- Intel Ice Lake 220 ms 181 ms -17.7% (1.22x) Intel Sapphire Rapids 181 ms 145 ms -19.9% (1.25x) Intel Emerald Rapids 169 ms 148 ms -12.4% (1.14x) Intel Granite Rapids 191 ms 141 ms -26.2% (1.35x) AMD Zen 4 (Genoa) 171 ms 136 ms -20.5% (1.26x) AMD Zen 5 (Turin) 94 ms 72 ms -23.4% (1.31x) AMD Zen 6 (Venice) 95 ms 66 ms -30.5% (1.44x) ==================================================================== Bug: None Change-Id: I4cd657410cc5253b5e8fd2caa78d17e2b3812393 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8445804 Reviewed-by: richard winterton <rrwinterton@gmail.com> Commit-Queue: Frank Barchard <fbarchard@google.com>
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@ -375,7 +375,6 @@ extern "C" {
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#define HAS_RGB24TOARGBROW_AVX512BW
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#define HAS_RGB24TOARGBROW_AVX512BW
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#define HAS_RAWTORGB24ROW_AVX512BW
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#define HAS_RAWTORGB24ROW_AVX512BW
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#define HAS_ARGBSHUFFLEROW_AVX512BW
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#define HAS_ARGBSHUFFLEROW_AVX512BW
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#define HAS_I422TORGB24ROW_AVX512VBMI
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_I422TORGB24ROW_AVX512BW
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#define HAS_I422TORGB24ROW_AVX512BW
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#define HAS_I422TOAR30ROW_AVX512BW
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#define HAS_I422TOAR30ROW_AVX512BW
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@ -418,6 +417,7 @@ extern "C" {
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#define HAS_RAWTORGB24ROW_AVX512BW
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#define HAS_RAWTORGB24ROW_AVX512BW
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_ARGBTORGB24ROW_AVX512VBMI
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#define HAS_ARGBTORGB24ROW_AVX512VBMI
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#define HAS_I422TORGB24ROW_AVX512VBMI
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#define HAS_CONVERT16TO8ROW_AVX512BW
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#define HAS_CONVERT16TO8ROW_AVX512BW
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#define HAS_CONVERT8TO16ROW_AVX512BW
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#define HAS_CONVERT8TO16ROW_AVX512BW
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#define HAS_HALFROW_16TO8_AVX512BW
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#define HAS_HALFROW_16TO8_AVX512BW
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@ -436,7 +436,6 @@ extern "C" {
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#define HAS_BLENDPLANEROW_AVX512BW
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#define HAS_BLENDPLANEROW_AVX512BW
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#define HAS_RGBTOUV444MATRIXROW_AVX512BW
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#define HAS_RGBTOUV444MATRIXROW_AVX512BW
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#define HAS_ARGBTOYMATRIXROW_AVX512BW
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#define HAS_ARGBTOYMATRIXROW_AVX512BW
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#define HAS_I422TORGB24ROW_AVX512VBMI
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_RAWTORGB24ROW_AVX512VBMI
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#define HAS_I422TORGB24ROW_AVX512BW
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#define HAS_I422TORGB24ROW_AVX512BW
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#define HAS_ARGBTOUVMATRIXROW_AVX512BW
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#define HAS_ARGBTOUVMATRIXROW_AVX512BW
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@ -5275,12 +5274,6 @@ void NV12ToRGB565Row_Any_AVX2(const uint8_t* y_buf,
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uint8_t* dst_ptr,
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uint8_t* dst_ptr,
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const struct YuvConstants* yuvconstants,
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const struct YuvConstants* yuvconstants,
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int width);
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int width);
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void I422ToRGB24Row_Any_AVX512VBMI(const uint8_t* y_buf,
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const uint8_t* u_buf,
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const uint8_t* v_buf,
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uint8_t* dst_ptr,
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const struct YuvConstants* yuvconstants,
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int width);
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void I422ToRGB24Row_Any_AVX512BW(const uint8_t* y_buf,
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void I422ToRGB24Row_Any_AVX512BW(const uint8_t* y_buf,
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const uint8_t* u_buf,
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const uint8_t* u_buf,
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const uint8_t* v_buf,
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const uint8_t* v_buf,
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@ -5703,10 +5703,7 @@ int I420ToRGB24Matrix(const uint8_t* src_y,
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#endif
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#endif
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#if defined(HAS_I422TORGB24ROW_AVX512VBMI)
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#if defined(HAS_I422TORGB24ROW_AVX512VBMI)
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if (TestCpuFlag(kCpuHasAVX512VBMI)) {
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if (TestCpuFlag(kCpuHasAVX512VBMI)) {
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I422ToRGB24Row = I422ToRGB24Row_Any_AVX512VBMI;
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I422ToRGB24Row = I422ToRGB24Row_AVX512VBMI;
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if (IS_ALIGNED(width, 32)) {
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I422ToRGB24Row = I422ToRGB24Row_AVX512VBMI;
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}
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}
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}
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#endif
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#endif
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#if defined(HAS_I422TORGB24ROW_NEON)
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#if defined(HAS_I422TORGB24ROW_NEON)
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@ -5924,10 +5921,7 @@ int I422ToRGB24Matrix(const uint8_t* src_y,
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#endif
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#endif
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#if defined(HAS_I422TORGB24ROW_AVX512VBMI)
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#if defined(HAS_I422TORGB24ROW_AVX512VBMI)
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if (TestCpuFlag(kCpuHasAVX512VBMI)) {
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if (TestCpuFlag(kCpuHasAVX512VBMI)) {
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I422ToRGB24Row = I422ToRGB24Row_Any_AVX512VBMI;
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I422ToRGB24Row = I422ToRGB24Row_AVX512VBMI;
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if (IS_ALIGNED(width, 32)) {
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I422ToRGB24Row = I422ToRGB24Row_AVX512VBMI;
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}
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}
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}
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#endif
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#endif
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#if defined(HAS_I422TORGB24ROW_NEON)
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#if defined(HAS_I422TORGB24ROW_NEON)
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@ -420,9 +420,6 @@ ANY31C(I444ToRGB24Row_Any_SSSE3, I444ToRGB24Row_SSSE3, 0, 0, 3, 15)
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#ifdef HAS_I422TORGB24ROW_AVX2
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#ifdef HAS_I422TORGB24ROW_AVX2
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ANY31C(I422ToRGB24Row_Any_AVX2, I422ToRGB24Row_AVX2, 1, 0, 3, 15)
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ANY31C(I422ToRGB24Row_Any_AVX2, I422ToRGB24Row_AVX2, 1, 0, 3, 15)
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#endif
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#endif
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#ifdef HAS_I422TORGB24ROW_AVX512VBMI
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ANY31C(I422ToRGB24Row_Any_AVX512VBMI, I422ToRGB24Row_AVX512VBMI, 1, 0, 3, 31)
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#endif
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#ifdef HAS_I422TORGB24ROW_AVX512BW
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#ifdef HAS_I422TORGB24ROW_AVX512BW
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ANY31C(I422ToRGB24Row_Any_AVX512BW, I422ToRGB24Row_AVX512BW, 1, 0, 3, 31)
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ANY31C(I422ToRGB24Row_Any_AVX512BW, I422ToRGB24Row_AVX512BW, 1, 0, 3, 31)
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#endif
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#endif
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@ -4120,12 +4120,15 @@ void OMITFP I422ToRGB24Row_AVX512VBMI(const uint8_t* y_buf,
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uint8_t* dst_rgb24,
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uint8_t* dst_rgb24,
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const struct YuvConstants* yuvconstants,
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const struct YuvConstants* yuvconstants,
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int width) {
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int width) {
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uintptr_t temp;
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asm volatile (
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asm volatile (
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YUVTORGB_SETUP_AVX512BW(yuvconstants)
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YUVTORGB_SETUP_AVX512BW(yuvconstants)
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"vmovdqu32 %[kMaskBG],%%zmm20 \n"
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"vmovdqu32 %[kMaskBG],%%zmm20 \n"
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"vmovdqu32 %[kMaskDST0],%%zmm21 \n"
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"vmovdqu32 %[kMaskDST0],%%zmm21 \n"
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"vmovdqu32 %[kMaskDST1],%%zmm22 \n"
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"vmovdqu32 %[kMaskDST1],%%zmm22 \n"
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"sub %[u_buf],%[v_buf] \n"
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"sub %[u_buf],%[v_buf] \n"
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"sub $0x20,%[width] \n"
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"jl 2f \n"
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LABELALIGN
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LABELALIGN
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"1: \n"
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"1: \n"
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@ -4133,13 +4136,57 @@ void OMITFP I422ToRGB24Row_AVX512VBMI(const uint8_t* y_buf,
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YUVTORGB_AVX512BW(yuvconstants)
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YUVTORGB_AVX512BW(yuvconstants)
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STORERGB24_AVX512VBMI
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STORERGB24_AVX512VBMI
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"sub $0x20,%[width] \n"
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"sub $0x20,%[width] \n"
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"jg 1b \n"
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"jge 1b \n"
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"2: \n"
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"add $0x20,%[width] \n"
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"je 99f \n"
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// Calculate a mask for the final iteration to deal with the tail.
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"mov $-1,%[temp] \n"
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"bzhi %q[width],%[temp],%[temp] \n"
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"kmovd %k[temp],%%k1 \n"
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"vpmovzxbw (%[y_buf]),%%zmm4%{%%k1%}%{z%}\n"
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"mov $-1,%[temp] \n"
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"lea 1(%q[width]),%k[y_buf] \n"
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"shr $1,%k[y_buf] \n"
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"bzhi %q[y_buf],%[temp],%[y_buf] \n"
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"kmovw %k[y_buf],%%k2 \n"
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"vmovdqu8 (%[u_buf]),%%xmm3%{%%k2%}%{z%}\n"
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"vmovdqu8 0x00(%[u_buf],%[v_buf],1),%%xmm1%{%%k2%}%{z%}\n"
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"lea (%q[width],%q[width],2),%k[width]\n"
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"bzhi %q[width],%[temp],%[y_buf] \n"
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"kmovq %[y_buf],%%k3 \n"
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"xor %k[y_buf],%k[y_buf] \n"
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"sub $0x40,%k[width] \n"
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"cmovg %[temp],%[y_buf] \n"
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"bzhi %q[width],%[y_buf],%[y_buf] \n"
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"kmovd %k[y_buf],%%k4 \n"
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"vpunpcklbw %%xmm1,%%xmm3,%%xmm2 \n"
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"vpunpckhbw %%xmm1,%%xmm3,%%xmm3 \n"
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"vinserti64x2 $1,%%xmm3,%%ymm2,%%ymm3 \n"
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"vmovdqa64 %%zmm16,%%zmm1 \n"
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"vpermi2w %%zmm3,%%zmm3,%%zmm1 \n"
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"vpsllw $8,%%zmm4,%%zmm3 \n"
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"vpord %%zmm3,%%zmm4,%%zmm4 \n"
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"vmovdqa64 %%zmm1,%%zmm3 \n"
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YUVTORGB_AVX512BW(yuvconstants)
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"vpermt2b %%zmm1,%%zmm20,%%zmm0 \n"
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"vmovdqa64 %%zmm0,%%zmm3 \n"
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"vpermt2b %%zmm2,%%zmm21,%%zmm3 \n"
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"vpermt2b %%zmm2,%%zmm22,%%zmm0 \n"
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"vmovdqu8 %%zmm3,(%[dst_rgb24])%{%%k3%} \n"
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"vmovdqu8 %%ymm0,0x40(%[dst_rgb24])%{%%k4%}\n"
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"99: \n"
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"vzeroupper \n"
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"vzeroupper \n"
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: [y_buf]"+r"(y_buf), // %[y_buf]
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: [y_buf]"+r"(y_buf), // %[y_buf]
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[u_buf]"+r"(u_buf), // %[u_buf]
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[u_buf]"+r"(u_buf), // %[u_buf]
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[v_buf]"+r"(v_buf), // %[v_buf]
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[v_buf]"+r"(v_buf), // %[v_buf]
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[dst_rgb24]"+r"(dst_rgb24), // %[dst_rgb24]
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[dst_rgb24]"+r"(dst_rgb24), // %[dst_rgb24]
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[width]"+rm"(width) // %[width]
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[width]"+r"(width), // %[width]
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[temp]"=&r"(temp) // %[temp]
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: [yuvconstants]"r"(yuvconstants), // %[yuvconstants]
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: [yuvconstants]"r"(yuvconstants), // %[yuvconstants]
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[quadsplitperm]"r"(kSplitQuadWords), // %[quadsplitperm]
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[quadsplitperm]"r"(kSplitQuadWords), // %[quadsplitperm]
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[dquadsplitperm]"r"(kSplitDoubleQuadWords), // %[dquadsplitperm]
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[dquadsplitperm]"r"(kSplitDoubleQuadWords), // %[dquadsplitperm]
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@ -4149,7 +4196,8 @@ void OMITFP I422ToRGB24Row_AVX512VBMI(const uint8_t* y_buf,
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[kMaskDST1]"m"(kMaskDST1) // %[kMaskDST1]
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[kMaskDST1]"m"(kMaskDST1) // %[kMaskDST1]
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: "memory", "cc", YUVTORGB_REGS_AVX512BW
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: "memory", "cc", YUVTORGB_REGS_AVX512BW
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5",
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5",
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"xmm20", "xmm21", "xmm22"
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"xmm20", "xmm21", "xmm22",
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"k1", "k2", "k3", "k4"
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);
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);
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}
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}
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#endif // defined(HAS_I422TORGB24ROW_AVX512VBMI)
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#endif // defined(HAS_I422TORGB24ROW_AVX512VBMI)
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