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synced 2026-10-28 18:07:12 +08:00
Fix remaining inline asm input/output constraints and clobbers
Mark modified inline asm operands as read-write (+r / +c) and add missing volatile/memory clobbers so compilers and LTO do not assume modified registers remain unchanged across asm blocks: - HashDjb2_NEON (compare_neon64.cc): [src] "+r"(src) for post-increment ldr - FixedDiv1_X86 (scale_gcc.cc): "+c"(div) for sub $0x1, %1 - P410ToARGBRow_SVE_SC & P410ToAR30Row_SVE_SC (row_sve.h): [vl] "+r"(vl) for tail cntw %x[vl] - SwapUVRow_RVV & ARGBMultiplyRow_RVV (row_rvv.cc): use asm volatile and "memory" clobber instead of VLA memory operands on mutated pointers R=rrwinterton@gmail.com Bug: b/571179207 Test: libyuv_unittest Change-Id: I3c2475d1e5bdab13e74643a028eebc350edcc1bb Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8565646 Reviewed-by: richard winterton <rrwinterton@gmail.com> Commit-Queue: Frank Barchard <fbarchard@google.com>
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@ -1767,9 +1767,9 @@ static inline void P410ToARGBRow_SVE_SC(const uint16_t* src_y,
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: [src_y] "+r"(src_y), // %[src_y]
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: [src_y] "+r"(src_y), // %[src_y]
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[src_uv] "+r"(src_uv), // %[src_uv]
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[src_uv] "+r"(src_uv), // %[src_uv]
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[dst_argb] "+r"(dst_argb), // %[dst_argb]
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[dst_argb] "+r"(dst_argb), // %[dst_argb]
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[width] "+r"(width) // %[width]
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[width] "+r"(width), // %[width]
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: [vl] "r"(vl), // %[vl]
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[vl] "+r"(vl) // %[vl]
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[kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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: [kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[width_last_y] "r"(width_last_y) // %[width_last_y]
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[width_last_y] "r"(width_last_y) // %[width_last_y]
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: "cc", "memory", YUVTORGB_SVE_REGS);
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: "cc", "memory", YUVTORGB_SVE_REGS);
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@ -1818,9 +1818,9 @@ static inline void P410ToAR30Row_SVE_SC(const uint16_t* src_y,
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: [src_y] "+r"(src_y), // %[src_y]
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: [src_y] "+r"(src_y), // %[src_y]
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[src_uv] "+r"(src_uv), // %[src_uv]
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[src_uv] "+r"(src_uv), // %[src_uv]
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[dst_ar30] "+r"(dst_ar30), // %[dst_ar30]
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[dst_ar30] "+r"(dst_ar30), // %[dst_ar30]
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[width] "+r"(width) // %[width]
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[width] "+r"(width), // %[width]
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: [vl] "r"(vl), // %[vl]
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[vl] "+r"(vl) // %[vl]
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[kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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: [kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[width_last_y] "r"(width_last_y), // %[width_last_y]
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[width_last_y] "r"(width_last_y), // %[width_last_y]
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[limit] "r"(limit) // %[limit]
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[limit] "r"(limit) // %[limit]
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@ -145,12 +145,12 @@ uint32_t HashDjb2_NEON(const uint8_t* src, int count, uint32_t seed) {
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"add %w[tmp], %w[tmp], %w[tmp2] \n"
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"add %w[tmp], %w[tmp], %w[tmp2] \n"
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"madd %w[hash], %w[hash], %w[c16], %w[tmp] \n"
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"madd %w[hash], %w[hash], %w[c16], %w[tmp] \n"
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"b.gt 1b \n"
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"b.gt 1b \n"
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: [hash] "+r"(hash), // %[hash]
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: [src] "+r"(src), // %[src]
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[hash] "+r"(hash), // %[hash]
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[count] "+r"(count), // %[count]
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[count] "+r"(count), // %[count]
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[tmp] "=&r"(tmp), // %[tmp]
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[tmp] "=&r"(tmp), // %[tmp]
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[tmp2] "=&r"(tmp2) // %[tmp2]
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[tmp2] "=&r"(tmp2) // %[tmp2]
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: [src] "r"(src), // %[src]
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: [kMuls] "r"(kDjb2Multiplicands), // %[kMuls]
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[kMuls] "r"(kDjb2Multiplicands), // %[kMuls]
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[kIdx] "r"(kDjb2WidenIndices), // %[kIdx]
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[kIdx] "r"(kDjb2WidenIndices), // %[kIdx]
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[c16] "r"(c16) // %[c16]
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[c16] "r"(c16) // %[c16]
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: "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16",
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: "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16",
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@ -1711,10 +1711,9 @@ void MergeUVRow_RVV(const uint8_t* src_u,
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#ifdef HAS_SWAPUVROW_RVV
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#ifdef HAS_SWAPUVROW_RVV
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void SwapUVRow_RVV(const uint8_t* src_uv, uint8_t* dst_vu, int width) {
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void SwapUVRow_RVV(const uint8_t* src_uv, uint8_t* dst_vu, int width) {
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assert(width != 0);
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assert(width != 0);
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wvla"
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size_t vl;
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size_t vl;
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asm("1: \n"
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asm volatile(
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"1: \n"
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"vsetvli %[vl], %[w], e16, m4, ta, ma \n"
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"vsetvli %[vl], %[w], e16, m4, ta, ma \n"
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"vle16.v v8, (%[src_uv]) \n"
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"vle16.v v8, (%[src_uv]) \n"
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"vsrl.vi v12, v8, 8 \n"
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"vsrl.vi v12, v8, 8 \n"
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@ -1729,11 +1728,10 @@ void SwapUVRow_RVV(const uint8_t* src_uv, uint8_t* dst_vu, int width) {
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: [src_uv] "+r"(src_uv), // %[src_uv]
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: [src_uv] "+r"(src_uv), // %[src_uv]
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[dst_vu] "+r"(dst_vu), // %[dst_vu]
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[dst_vu] "+r"(dst_vu), // %[dst_vu]
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[w] "+r"(width), // %[w]
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[w] "+r"(width), // %[w]
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[vl] "=&r"(vl), // %[vl]
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[vl] "=&r"(vl) // %[vl]
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"=m"(*(uint8_t (*)[width * 2]) dst_vu)
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:
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: "m"(*(const uint8_t (*)[width * 2]) src_uv)
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: RVV_VL_CLOBBER "memory", "v8", "v9", "v10", "v11", "v12", "v13", "v14",
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: RVV_VL_CLOBBER "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15");
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"v15");
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#pragma GCC diagnostic pop
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}
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}
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#endif
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#endif
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@ -2330,10 +2328,9 @@ void ARGBMultiplyRow_RVV(const uint8_t* src_argb,
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int width) {
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int width) {
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assert(width != 0);
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assert(width != 0);
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size_t w = (size_t)width * 4;
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size_t w = (size_t)width * 4;
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wvla"
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size_t vl;
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size_t vl;
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asm("1: \n"
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asm volatile(
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"1: \n"
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"vsetvli %[vl], %[w], e8, m2, ta, ma \n"
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"vsetvli %[vl], %[w], e8, m2, ta, ma \n"
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"vle8.v v8, (%[src0]) \n"
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"vle8.v v8, (%[src0]) \n"
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"vle8.v v10, (%[src1]) \n"
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"vle8.v v10, (%[src1]) \n"
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@ -2350,13 +2347,10 @@ void ARGBMultiplyRow_RVV(const uint8_t* src_argb,
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[src1] "+r"(src_argb1), // %[src1]
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[src1] "+r"(src_argb1), // %[src1]
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[dst] "+r"(dst_argb), // %[dst]
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[dst] "+r"(dst_argb), // %[dst]
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[w] "+r"(w), // %[w]
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[w] "+r"(w), // %[w]
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[vl] "=&r"(vl), // %[vl]
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[vl] "=&r"(vl) // %[vl]
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"=m"(*(uint8_t (*)[w])dst_argb)
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: [k128] "r"(128) // %[k128]
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: [k128] "r"(128), // %[k128]
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: RVV_VL_CLOBBER "memory", "v8", "v9", "v10", "v11", "v12", "v13", "v14",
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"m"(*(const uint8_t (*)[w])src_argb),
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"v15");
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"m"(*(const uint8_t (*)[w])src_argb1)
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: RVV_VL_CLOBBER "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15");
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#pragma GCC diagnostic pop
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}
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}
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#endif
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#endif
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@ -3084,8 +3084,9 @@ int FixedDiv1_X86(int num, int div) {
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"sub $0x1,%1 \n"
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"sub $0x1,%1 \n"
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"idiv %1 \n"
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"idiv %1 \n"
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"mov %0, %%eax \n"
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"mov %0, %%eax \n"
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: "+a"(num) // %0
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: "+a"(num), // %0
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: "c"(div) // %1
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"+c"(div) // %1
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:
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: "memory", "cc", "edx");
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: "memory", "cc", "edx");
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return num;
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return num;
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}
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}
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