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cpuid for arm/mips/riscv initialize buffer

Browse Source 
- change cpu printf to hex to better show flags

util/cpuid:
Cpu Flags 0x30000001
Has RISCV 0x10000000
Has RVV 0x20000000


[ RUN      ] LibYUVBaseTest.TestCpuHas
Cpu Flags 0x30000001
Has RISCV 0x10000000
Has RVV 0x20000000
Has RVVZVFH 0x0
[       OK ] LibYUVBaseTest.TestCpuHas (1 ms)
[ RUN      ] LibYUVBaseTest.TestCompilerMacros
__ATOMIC_RELAXED 0
__cplusplus 201703
__clang_major__ 9999
__clang_minor__ 0
__GNUC__ 4
__GNUC_MINOR__ 2
__riscv 1
__riscv_vector 1
__clang__ 1
__llvm__ 1
__pic__ 2
INT_TYPES_DEFINED
__has_feature

Bug: libyuv:956
Change-Id: Iee4f1f34799434390e756de1e6c2c4596d82ace5
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/4484957
Reviewed-by: Wan-Teh Chang <wtc@google.com>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
Frank Barchard 2023-04-27 15:10:28 -07:00 committed by libyuv LUCI CQ
parent cf21b5ea5c
commit 7c6a7e5737
6 changed files with 177 additions and 168 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.chromium
View File

@ -1,6 +1,6 @@
Name: libyuv Name: libyuv
URL: http://code.google.com/p/libyuv/ URL: http://code.google.com/p/libyuv/
Version: 1866 Version: 1867
License: BSD License: BSD
License File: LICENSE License File: LICENSE

2
include/libyuv/version.h
View File

@ -11,6 +11,6 @@
#ifndef INCLUDE_LIBYUV_VERSION_H_ #ifndef INCLUDE_LIBYUV_VERSION_H_
#define INCLUDE_LIBYUV_VERSION_H_ #define INCLUDE_LIBYUV_VERSION_H_
#define LIBYUV_VERSION 1866 #define LIBYUV_VERSION 1867
#endif // INCLUDE_LIBYUV_VERSION_H_ #endif // INCLUDE_LIBYUV_VERSION_H_

148
source/cpu_id.cc
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@ -40,7 +40,6 @@ extern "C" {
// cpu_info_ variable for SIMD instruction sets detected. // cpu_info_ variable for SIMD instruction sets detected.
LIBYUV_API int cpu_info_ = 0; LIBYUV_API int cpu_info_ = 0;
// TODO(fbarchard): Consider using int for cpuid so casting is not needed.
// Low level cpuid for X86. // Low level cpuid for X86.
#if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \ #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
defined(__x86_64__)) && \ defined(__x86_64__)) && \
@ -143,7 +142,8 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
// This will occur for Chrome sandbox for Pepper or Render process. // This will occur for Chrome sandbox for Pepper or Render process.
return kCpuHasNEON; return kCpuHasNEON;
} }
while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
if (memcmp(cpuinfo_line, "Features", 8) == 0) { if (memcmp(cpuinfo_line, "Features", 8) == 0) {
char* p = strstr(cpuinfo_line, " neon"); char* p = strstr(cpuinfo_line, " neon");
if (p && (p[5] == ' ' || p[5] == '\n')) { if (p && (p[5] == ' ' || p[5] == '\n')) {
@ -162,17 +162,85 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
return 0; return 0;
} }
// TODO(fbarchard): Consider read_msa_ir(). LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
char cpuinfo_line[512];
int flag = 0;
FILE* f = fopen(cpuinfo_name, "re");
if (!f) {
#if defined(__riscv_vector)
// Assume RVV if /proc/cpuinfo is unavailable.
// This will occur for Chrome sandbox for Pepper or Render process.
return kCpuHasRVV;
#else
return 0;
#endif
}
memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
if (memcmp(cpuinfo_line, "isa", 3) == 0) {
// ISA string must begin with rv64{i,e,g} for a 64-bit processor.
char* isa = strstr(cpuinfo_line, "rv64");
if (isa) {
const int isa_len = strlen(isa);
// 5 ISA characters + 1 new-line character
if (isa_len < 6) {
fclose(f);
return 0;
}
// Skip {i,e,g} canonical checking.
// Skip rvxxx
isa += 5;
// Find the very first occurrence of 's', 'x' or 'z'.
// To detect multi-letter standard, non-standard, and
// supervisor-level extensions.
int extensions_len = 0;
char* extensions = strpbrk(isa, "zxs");
if (extensions) {
extensions_len = strlen(extensions);
// Multi-letter extensions are seperated by a single underscore
// as described in RISC-V User-Level ISA V2.2.
char* ext = strtok(extensions, "_");
while (ext) {
// Search for the ZVFH (Vector FP16) extension.
if (!strcmp(ext, "zvfh")) {
flag |= kCpuHasRVVZVFH;
}
ext = strtok(NULL, "_");
}
}
const int std_isa_len = isa_len - extensions_len - 5 - 1;
// Detect the v in the standard single-letter extensions.
if (memchr(isa, 'v', std_isa_len)) {
// The RVV implied the F extension.
flag |= kCpuHasRVV;
}
}
}
#if defined(__riscv_vector)
// Assume RVV if /proc/cpuinfo is from x86 host running QEMU.
else if ((memcmp(cpuinfo_line, "vendor_id\t: GenuineIntel", 24) == 0) ||
(memcmp(cpuinfo_line, "vendor_id\t: AuthenticAMD", 24) == 0)) {
fclose(f);
return kCpuHasRVV;
}
#endif
}
fclose(f);
return flag;
}
LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) { LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
char cpuinfo_line[512]; char cpuinfo_line[512];
int flag = 0x0; int flag = 0;
FILE* f = fopen(cpuinfo_name, "re"); FILE* f = fopen(cpuinfo_name, "re");
if (!f) { if (!f) {
// Assume nothing if /proc/cpuinfo is unavailable. // Assume nothing if /proc/cpuinfo is unavailable.
// This will occur for Chrome sandbox for Pepper or Render process. // This will occur for Chrome sandbox for Pepper or Render process.
return 0; return 0;
} }
while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { memset(cpuinfo_line, 0, sizeof(cpuinfo_line));
while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f)) {
if (memcmp(cpuinfo_line, "cpu model", 9) == 0) { if (memcmp(cpuinfo_line, "cpu model", 9) == 0) {
// Workaround early kernel without MSA in ASEs line. // Workaround early kernel without MSA in ASEs line.
if (strstr(cpuinfo_line, "Loongson-2K")) { if (strstr(cpuinfo_line, "Loongson-2K")) {
@ -191,81 +259,13 @@ LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
return flag; return flag;
} }
LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
char cpuinfo_line[512];
int flag = 0x0;
FILE* f = fopen(cpuinfo_name, "re");
if (!f) {
#if defined(__riscv_vector)
// Assume RVV if /proc/cpuinfo is unavailable.
// This will occur for Chrome sandbox for Pepper or Render process.
return kCpuHasRVV;
#else
return 0;
#endif
}
while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
if (memcmp(cpuinfo_line, "isa", 3) == 0) {
// ISA string must begin with rv64{i,e,g} for a 64-bit processor.
char* isa = strstr(cpuinfo_line, "rv64");
if (isa) {
const int isa_len = strlen(isa);
// 5 ISA characters + 1 new-line character
if (isa_len < 6) {
fclose(f);
return 0;
}
// Skip {i,e,g} canonical checking.
// Skip rvxxx
isa += 5;
// Find the very first occurrence of 's', 'x' or 'z'.
// To detect multi-letter standard, non-standard, and
// supervisor-level extensions.
int otherExts_len = 0;
char* otherExts = strpbrk(isa, "zxs");
if (otherExts) {
otherExts_len = strlen(otherExts);
// Multi-letter extensions are seperated by a single underscore
// as described in RISC-V User-Level ISA V2.2.
char* ext = strtok(otherExts, "_");
while (ext) {
// Search for the ZVFH (Vector FP16) extension.
// The ZVFH implied the (Scalar FP16)ZFH extension.
if (!strcmp(ext, "zvfh") || !strcmp(ext, "zvfh\n")) {
flag |= kCpuHasRVVZVFH;
}
ext = strtok(NULL, "_");
}
}
const int std_isa_len = isa_len - otherExts_len - 5 - 1;
// Detect the v in the standard single-letter extensions.
// Skip optional Zve* and Zvl* extensions detection at otherExts.
if (memchr(isa, 'v', std_isa_len)) {
// The RVV implied the F extension.
flag |= kCpuHasRVV;
}
}
}
#if defined(__riscv_vector)
else if ((memcmp(cpuinfo_line, "vendor_id\t: GenuineIntel", 24) == 0) ||
(memcmp(cpuinfo_line, "vendor_id\t: AuthenticAMD", 24) == 0)) {
flag |= kCpuHasRVV;
}
#endif
}
fclose(f);
return flag;
}
// TODO(fbarchard): Consider read_loongarch_ir().
#define LOONGARCH_CFG2 0x2 #define LOONGARCH_CFG2 0x2
#define LOONGARCH_CFG2_LSX (1 << 6) #define LOONGARCH_CFG2_LSX (1 << 6)
#define LOONGARCH_CFG2_LASX (1 << 7) #define LOONGARCH_CFG2_LASX (1 << 7)
#if defined(__loongarch__) #if defined(__loongarch__)
LIBYUV_API SAFEBUFFERS int LoongarchCpuCaps(void) { LIBYUV_API SAFEBUFFERS int LoongarchCpuCaps(void) {
int flag = 0x0; int flag = 0;
uint32_t cfg2 = 0; uint32_t cfg2 = 0;
__asm__ volatile("cpucfg %0, %1 \n\t" : "+&r"(cfg2) : "r"(LOONGARCH_CFG2)); __asm__ volatile("cpucfg %0, %1 \n\t" : "+&r"(cfg2) : "r"(LOONGARCH_CFG2));

116
unit_test/cpu_test.cc
View File

@ -20,21 +20,23 @@ namespace libyuv {
TEST_F(LibYUVBaseTest, TestCpuHas) { TEST_F(LibYUVBaseTest, TestCpuHas) {
int cpu_flags = TestCpuFlag(-1); int cpu_flags = TestCpuFlag(-1);
printf("Cpu Flags %d\n", cpu_flags); printf("Cpu Flags 0x%x\n", cpu_flags);
#if defined(__arm__) || defined(__aarch64__) #if defined(__arm__) || defined(__aarch64__)
int has_arm = TestCpuFlag(kCpuHasARM); int has_arm = TestCpuFlag(kCpuHasARM);
printf("Has ARM %d\n", has_arm); printf("Has ARM 0x%x\n", has_arm);
int has_neon = TestCpuFlag(kCpuHasNEON); int has_neon = TestCpuFlag(kCpuHasNEON);
printf("Has NEON %d\n", has_neon); printf("Has NEON 0x%x\n", has_neon);
#endif #endif
#if defined(__riscv) && defined(__linux__) #if defined(__riscv) && defined(__linux__)
int has_riscv = TestCpuFlag(kCpuHasRISCV); int has_riscv = TestCpuFlag(kCpuHasRISCV);
printf("Has RISCV %d\n", has_riscv); printf("Has RISCV 0x%x\n", has_riscv);
int has_rvv = TestCpuFlag(kCpuHasRVV); int has_rvv = TestCpuFlag(kCpuHasRVV);
printf("Has RVV %d\n", has_rvv); printf("Has RVV 0x%x\n", has_rvv);
int has_rvvzvfh = TestCpuFlag(kCpuHasRVVZVFH); int has_rvvzvfh = TestCpuFlag(kCpuHasRVVZVFH);
printf("Has RVVZVFH %d\n", has_rvvzvfh); printf("Has RVVZVFH 0x%x\n", has_rvvzvfh);
#endif #endif
#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || \
defined(_M_X64)
int has_x86 = TestCpuFlag(kCpuHasX86); int has_x86 = TestCpuFlag(kCpuHasX86);
int has_sse2 = TestCpuFlag(kCpuHasSSE2); int has_sse2 = TestCpuFlag(kCpuHasSSE2);
int has_ssse3 = TestCpuFlag(kCpuHasSSSE3); int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
@ -53,39 +55,38 @@ TEST_F(LibYUVBaseTest, TestCpuHas) {
int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2); int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2);
int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG); int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG);
int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ); int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ);
printf("Has X86 %d\n", has_x86); printf("Has X86 0x%x\n", has_x86);
printf("Has SSE2 %d\n", has_sse2); printf("Has SSE2 0x%x\n", has_sse2);
printf("Has SSSE3 %d\n", has_ssse3); printf("Has SSSE3 0x%x\n", has_ssse3);
printf("Has SSE41 %d\n", has_sse41); printf("Has SSE41 0x%x\n", has_sse41);
printf("Has SSE42 %d\n", has_sse42); printf("Has SSE42 0x%x\n", has_sse42);
printf("Has AVX %d\n", has_avx); printf("Has AVX 0x%x\n", has_avx);
printf("Has AVX2 %d\n", has_avx2); printf("Has AVX2 0x%x\n", has_avx2);
printf("Has ERMS %d\n", has_erms); printf("Has ERMS 0x%x\n", has_erms);
printf("Has FMA3 %d\n", has_fma3); printf("Has FMA3 0x%x\n", has_fma3);
printf("Has F16C %d\n", has_f16c); printf("Has F16C 0x%x\n", has_f16c);
printf("Has GFNI %d\n", has_gfni); printf("Has GFNI 0x%x\n", has_gfni);
printf("Has AVX512BW %d\n", has_avx512bw); printf("Has AVX512BW 0x%x\n", has_avx512bw);
printf("Has AVX512VL %d\n", has_avx512vl); printf("Has AVX512VL 0x%x\n", has_avx512vl);
printf("Has AVX512VNNI %d\n", has_avx512vnni); printf("Has AVX512VNNI 0x%x\n", has_avx512vnni);
printf("Has AVX512VBMI %d\n", has_avx512vbmi); printf("Has AVX512VBMI 0x%x\n", has_avx512vbmi);
printf("Has AVX512VBMI2 %d\n", has_avx512vbmi2); printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2);
printf("Has AVX512VBITALG %d\n", has_avx512vbitalg); printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg);
printf("Has AVX512VPOPCNTDQ %d\n", has_avx512vpopcntdq); printf("Has AVX512VPOPCNTDQ 0x%x\n", has_avx512vpopcntdq);
#endif
#if defined(__mips__) #if defined(__mips__)
int has_mips = TestCpuFlag(kCpuHasMIPS); int has_mips = TestCpuFlag(kCpuHasMIPS);
printf("Has MIPS %d\n", has_mips); printf("Has MIPS 0x%x\n", has_mips);
int has_msa = TestCpuFlag(kCpuHasMSA); int has_msa = TestCpuFlag(kCpuHasMSA);
printf("Has MSA %d\n", has_msa); printf("Has MSA 0x%x\n", has_msa);
#endif #endif
#if defined(__loongarch__) #if defined(__loongarch__)
int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH); int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH);
printf("Has LOONGARCH %d\n", has_loongarch); printf("Has LOONGARCH 0x%x\n", has_loongarch);
int has_lsx = TestCpuFlag(kCpuHasLSX); int has_lsx = TestCpuFlag(kCpuHasLSX);
printf("Has LSX %d\n", has_lsx); printf("Has LSX 0x%x\n", has_lsx);
int has_lasx = TestCpuFlag(kCpuHasLASX); int has_lasx = TestCpuFlag(kCpuHasLASX);
printf("Has LASX %d\n", has_lasx); printf("Has LASX 0x%x\n", has_lasx);
#endif #endif
} }
@ -112,27 +113,33 @@ TEST_F(LibYUVBaseTest, TestCompilerMacros) {
#ifdef __i386__ #ifdef __i386__
printf("__i386__ %d\n", __i386__); printf("__i386__ %d\n", __i386__);
#endif #endif
#ifdef __mips
printf("__mips %d\n", __mips);
#endif
#ifdef __mips_isa_rev
printf("__mips_isa_rev %d\n", __mips_isa_rev);
#endif
#ifdef __x86_64__ #ifdef __x86_64__
printf("__x86_64__ %d\n", __x86_64__); printf("__x86_64__ %d\n", __x86_64__);
#endif #endif
#ifdef _M_IX86
printf("_M_IX86 %d\n", _M_IX86);
#endif
#ifdef _M_X64
printf("_M_X64 %d\n", _M_X64);
#endif
#ifdef _MSC_VER #ifdef _MSC_VER
printf("_MSC_VER %d\n", _MSC_VER); printf("_MSC_VER %d\n", _MSC_VER);
#endif #endif
#ifdef __aarch64__ #ifdef __aarch64__
printf("__aarch64__ %d\n", __aarch64__); printf("__aarch64__ %d\n", __aarch64__);
#endif #endif
#ifdef __APPLE__
printf("__APPLE__ %d\n", __APPLE__);
#endif
#ifdef __arm__ #ifdef __arm__
printf("__arm__ %d\n", __arm__); printf("__arm__ %d\n", __arm__);
#endif #endif
#ifdef __riscv
printf("__riscv %d\n", __riscv);
#endif
#ifdef __riscv_vector
printf("__riscv_vector %d\n", __riscv_vector);
#endif
#ifdef __APPLE__
printf("__APPLE__ %d\n", __APPLE__);
#endif
#ifdef __clang__ #ifdef __clang__
printf("__clang__ %d\n", __clang__); printf("__clang__ %d\n", __clang__);
#endif #endif
@ -148,20 +155,11 @@ TEST_F(LibYUVBaseTest, TestCompilerMacros) {
#ifdef __mips_msa #ifdef __mips_msa
printf("__mips_msa %d\n", __mips_msa); printf("__mips_msa %d\n", __mips_msa);
#endif #endif
#ifdef __native_client__ #ifdef __mips
printf("__native_client__ %d\n", __native_client__); printf("__mips %d\n", __mips);
#endif #endif
#ifdef __pic__ #ifdef __mips_isa_rev
printf("__pic__ %d\n", __pic__); printf("__mips_isa_rev %d\n", __mips_isa_rev);
#endif
#ifdef __pnacl__
printf("__pnacl__ %d\n", __pnacl__);
#endif
#ifdef _M_IX86
printf("_M_IX86 %d\n", _M_IX86);
#endif
#ifdef _M_X64
printf("_M_X64 %d\n", _M_X64);
#endif #endif
#ifdef _MIPS_ARCH_LOONGSON3A #ifdef _MIPS_ARCH_LOONGSON3A
printf("_MIPS_ARCH_LOONGSON3A %d\n", _MIPS_ARCH_LOONGSON3A); printf("_MIPS_ARCH_LOONGSON3A %d\n", _MIPS_ARCH_LOONGSON3A);
@ -172,8 +170,14 @@ TEST_F(LibYUVBaseTest, TestCompilerMacros) {
#ifdef _WIN32 #ifdef _WIN32
printf("_WIN32 %d\n", _WIN32); printf("_WIN32 %d\n", _WIN32);
#endif #endif
#ifdef __riscv #ifdef __native_client__
printf("__riscv %d\n", __riscv); printf("__native_client__ %d\n", __native_client__);
#endif
#ifdef __pic__
printf("__pic__ %d\n", __pic__);
#endif
#ifdef __pnacl__
printf("__pnacl__ %d\n", __pnacl__);
#endif #endif
#ifdef GG_LONGLONG #ifdef GG_LONGLONG
printf("GG_LONGLONG %d\n", GG_LONGLONG); printf("GG_LONGLONG %d\n", GG_LONGLONG);
@ -211,7 +215,7 @@ TEST_F(LibYUVBaseTest, TestCpuId) {
cpu_info[0] = cpu_info[1]; // Reorder output cpu_info[0] = cpu_info[1]; // Reorder output
cpu_info[1] = cpu_info[3]; cpu_info[1] = cpu_info[3];
cpu_info[3] = 0; cpu_info[3] = 0;
printf("Cpu Vendor: %s %x %x %x\n", reinterpret_cast<char*>(&cpu_info[0]), printf("Cpu Vendor: %s 0x%x 0x%x 0x%x\n", reinterpret_cast<char*>(&cpu_info[0]),
cpu_info[0], cpu_info[1], cpu_info[2]); cpu_info[0], cpu_info[1], cpu_info[2]);
EXPECT_EQ(12u, strlen(reinterpret_cast<char*>(&cpu_info[0]))); EXPECT_EQ(12u, strlen(reinterpret_cast<char*>(&cpu_info[0])));

11
unit_test/scale_uv_test.cc
View File

@ -59,15 +59,15 @@ static int UVTestFilter(int src_width,
MaskCpuFlags(disable_cpu_flags); // Disable all CPU optimization. MaskCpuFlags(disable_cpu_flags); // Disable all CPU optimization.
double c_time = get_time(); double c_time = get_time();
UVScale(src_uv, src_stride_uv, src_width, src_height, UVScale(src_uv, src_stride_uv, src_width, src_height, dst_uv_c, dst_stride_uv,
dst_uv_c, dst_stride_uv, dst_width, dst_height, f); dst_width, dst_height, f);
c_time = (get_time() - c_time); c_time = (get_time() - c_time);
MaskCpuFlags(benchmark_cpu_info); // Enable all CPU optimization. MaskCpuFlags(benchmark_cpu_info); // Enable all CPU optimization.
double opt_time = get_time(); double opt_time = get_time();
for (i = 0; i < benchmark_iterations; ++i) { for (i = 0; i < benchmark_iterations; ++i) {
UVScale(src_uv, src_stride_uv, src_width, src_height, UVScale(src_uv, src_stride_uv, src_width, src_height, dst_uv_opt,
dst_uv_opt, dst_stride_uv, dst_width, dst_height, f); dst_stride_uv, dst_width, dst_height, f);
} }
opt_time = (get_time() - opt_time) / benchmark_iterations; opt_time = (get_time() - opt_time) / benchmark_iterations;
@ -113,8 +113,7 @@ static int UVTestFilter(int src_width,
TEST_FACTOR1(name, Box, nom, denom) TEST_FACTOR1(name, Box, nom, denom)
#else #else
// Test a scale factor with Bilinear. // Test a scale factor with Bilinear.
#define TEST_FACTOR(name, nom, denom) \ #define TEST_FACTOR(name, nom, denom) TEST_FACTOR1(name, Bilinear, nom, denom)
TEST_FACTOR1(name, Bilinear, nom, denom)
#endif #endif
TEST_FACTOR(2, 1, 2) TEST_FACTOR(2, 1, 2)

60
util/cpuid.c
View File

@ -21,8 +21,9 @@ using namespace libyuv;
int main(int argc, const char* argv[]) { int main(int argc, const char* argv[]) {
int cpu_flags = TestCpuFlag(-1); int cpu_flags = TestCpuFlag(-1);
int has_arm = TestCpuFlag(kCpuHasARM); int has_arm = TestCpuFlag(kCpuHasARM);
int has_mips = TestCpuFlag(kCpuHasMIPS); int has_riscv = TestCpuFlag(kCpuHasRISCV);
int has_x86 = TestCpuFlag(kCpuHasX86); int has_x86 = TestCpuFlag(kCpuHasX86);
int has_mips = TestCpuFlag(kCpuHasMIPS);
int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH); int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH);
(void)argc; (void)argc;
(void)argv; (void)argv;
@ -62,24 +63,28 @@ int main(int argc, const char* argv[]) {
model, model); model, model);
} }
#endif #endif
printf("Cpu Flags %x\n", cpu_flags); printf("Cpu Flags 0x%x\n", cpu_flags);
printf("Has ARM %x\n", has_arm);
printf("Has MIPS %x\n", has_mips);
printf("Has X86 %x\n", has_x86);
printf("Has LOONGARCH %x\n", has_loongarch);
if (has_arm) { if (has_arm) {
int has_neon = TestCpuFlag(kCpuHasNEON); int has_neon = TestCpuFlag(kCpuHasNEON);
printf("Has NEON %x\n", has_neon); printf("Has ARM 0x%x\n", has_arm);
printf("Has NEON 0x%x\n", has_neon);
}
if (has_riscv) {
int has_rvv = TestCpuFlag(kCpuHasRVV);
printf("Has RISCV 0x%x\n", has_riscv);
printf("Has RVV 0x%x\n", has_rvv);
} }
if (has_mips) { if (has_mips) {
int has_msa = TestCpuFlag(kCpuHasMSA); int has_msa = TestCpuFlag(kCpuHasMSA);
printf("Has MSA %x\n", has_msa); printf("Has MIPS 0x%x\n", has_mips);
printf("Has MSA 0x%x\n", has_msa);
} }
if (has_loongarch) { if (has_loongarch) {
int has_lsx = TestCpuFlag(kCpuHasLSX); int has_lsx = TestCpuFlag(kCpuHasLSX);
printf("Has LSX %x\n", has_lsx);
int has_lasx = TestCpuFlag(kCpuHasLASX); int has_lasx = TestCpuFlag(kCpuHasLASX);
printf("Has LASX %x\n", has_lasx); printf("Has LOONGARCH 0x%x\n", has_loongarch);
printf("Has LSX 0x%x\n", has_lsx);
printf("Has LASX 0x%x\n", has_lasx);
} }
if (has_x86) { if (has_x86) {
int has_sse2 = TestCpuFlag(kCpuHasSSE2); int has_sse2 = TestCpuFlag(kCpuHasSSE2);
@ -99,23 +104,24 @@ int main(int argc, const char* argv[]) {
int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2); int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2);
int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG); int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG);
int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ); int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ);
printf("Has SSE2 %x\n", has_sse2); printf("Has X86 0x%x\n", has_x86);
printf("Has SSSE3 %x\n", has_ssse3); printf("Has SSE2 0x%x\n", has_sse2);
printf("Has SSE4.1 %x\n", has_sse41); printf("Has SSSE3 0x%x\n", has_ssse3);
printf("Has SSE4.2 %x\n", has_sse42); printf("Has SSE4.1 0x%x\n", has_sse41);
printf("Has AVX %x\n", has_avx); printf("Has SSE4.2 0x%x\n", has_sse42);
printf("Has AVX2 %x\n", has_avx2); printf("Has AVX 0x%x\n", has_avx);
printf("Has ERMS %x\n", has_erms); printf("Has AVX2 0x%x\n", has_avx2);
printf("Has FMA3 %x\n", has_fma3); printf("Has ERMS 0x%x\n", has_erms);
printf("Has F16C %x\n", has_f16c); printf("Has FMA3 0x%x\n", has_fma3);
printf("Has GFNI %x\n", has_gfni); printf("Has F16C 0x%x\n", has_f16c);
printf("Has AVX512BW %x\n", has_avx512bw); printf("Has GFNI 0x%x\n", has_gfni);
printf("Has AVX512VL %x\n", has_avx512vl); printf("Has AVX512BW 0x%x\n", has_avx512bw);
printf("Has AVX512VNNI %x\n", has_avx512vnni); printf("Has AVX512VL 0x%x\n", has_avx512vl);
printf("Has AVX512VBMI %x\n", has_avx512vbmi); printf("Has AVX512VNNI 0x%x\n", has_avx512vnni);
printf("Has AVX512VBMI2 %x\n", has_avx512vbmi2); printf("Has AVX512VBMI 0x%x\n", has_avx512vbmi);
printf("Has AVX512VBITALG %x\n", has_avx512vbitalg); printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2);
printf("Has AVX512VPOPCNTDQ %x\n", has_avx512vpopcntdq); printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg);
printf("Has AVX512VPOPCNTDQ 0x%x\n", has_avx512vpopcntdq);
} }
return 0; return 0;
} }