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RVV port to inline from intrinsics
- avoids intrinsics API changes - build options for rvv not needed for inline instructions - declare vl and vtype clobbers instead of cc - tune for SiFive X280 using 16/32-bit loads and stores instead of vlseg/vsseg where more efficient - tune LMUL for SpacemiT K3 (256-bit vectors) with max m4 (m2 where constrained by register pressure or vlseg/vsseg field rules) - YUVTORGB use vmulhu NV12ToARGB performance estimates: CPU VLEN C Intrinsics Inline ASM Speedup (Inline) ------------------------------------------------------------------------ SiFive X390 1024-bit 360 ms 29 ms 9.5 ms 37.89x (3.05x) SiFive X280 512-bit 980 ms 115 ms 38.0 ms 25.79x (3.03x) SpacemiT K3 256-bit 420 ms 68 ms 28.0 ms 15.00x (2.43x) Google Coral 256-bit 1120 ms 190 ms 58.0 ms 19.31x (3.28x) T-Head C920 128-bit 510 ms 88 ms 39.0 ms 13.08x (2.26x) T-Head C908 128-bit 860 ms 145 ms 62.0 ms 13.87x (2.34x) Bug: b/443984359 Change-Id: If4097b99ced4cc2306f12236b8605994e713eecd Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8426529 Reviewed-by: richard winterton <rrwinterton@gmail.com> Commit-Queue: Frank Barchard <fbarchard@google.com>
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@ -1,6 +1,6 @@
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Name: libyuv
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URL: https://chromium.googlesource.com/libyuv/libyuv/
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Version: 1971
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Version: 1972
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Revision: DEPS
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License: BSD-3-Clause
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License File: LICENSE
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@ -627,14 +627,17 @@ extern "C" {
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#define HAS_ARGBTOYMATRIXROW_SVE2
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#define HAS_AYUVTOUVROW_SVE2
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#define HAS_AYUVTOVUROW_SVE2
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// #define HAS_CONVERT16TO8ROW_SVE2 // Disabled: NEON version is faster for 128 bit vectors.
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// Disabled: NEON version is faster for 128 bit vectors.
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// #define HAS_CONVERT16TO8ROW_SVE2
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#define HAS_CONVERT8TO8ROW_SVE2
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#define HAS_COPYROW_SVE2
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#define HAS_DIVIDEROW_16_SVE2
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#define HAS_HALFFLOATROW_SVE2
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#define HAS_HALFMERGEUVROW_SVE2
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// #define HAS_HALFROW_16TO8_SVE2 // Disabled: NEON version is faster for 128 bit vectors.
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// #define HAS_HALFWIDTHROW_16TO8_SVE2 // Disabled: NEON version is faster for 128 bit vectors.
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// Disabled: NEON version is faster for 128 bit vectors.
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// #define HAS_HALFROW_16TO8_SVE2
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// Disabled: NEON version is faster for 128 bit vectors.
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// #define HAS_HALFWIDTHROW_16TO8_SVE2
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#define HAS_I210ALPHATOARGBROW_SVE2
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#define HAS_I210TOAR30ROW_SVE2
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#define HAS_I210TOARGBROW_SVE2
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@ -857,20 +860,6 @@ extern "C" {
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#define HAS_YUY2TOYROW_LASX
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#endif
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv_vector)
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#if defined(__riscv_v_intrinsic) && __riscv_v_intrinsic >= 100000
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// Since v1.0, vcreate intrinsic is introduced
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#define LIBYUV_RVV_HAS_VCREATE
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#endif
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#if defined(__riscv_v_intrinsic) && __riscv_v_intrinsic >= 12000
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// Since v0.12, TUPLE_TYPE is introduced for segment load and store.
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#define LIBYUV_RVV_HAS_TUPLE_TYPE
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// Since v0.12, VXRM(fixed-point rounding mode) is included in arguments of
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// fixed-point intrinsics.
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#define LIBYUV_RVV_HAS_VXRM_ARG
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#endif
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#endif
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv_vector)
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#define HAS_AR64TOARGBROW_RVV
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#define HAS_ARGBCOPYYTOALPHAROW_RVV
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@ -896,20 +885,6 @@ extern "C" {
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#define HAS_SPLITUVROW_RVV
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#define HAS_SPLITXRGBROW_RVV
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#define HAS_SWAPUVROW_RVV
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// The following are available for RVV v0.11 and RVV v1.0
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// TODO(fbarchard): Port to RVV v0.12 (tuple)
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// missing support for vcreate_v:
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// __riscv_vcreate_v_u16m2x2
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// __riscv_vcreate_v_u16m2x4
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// __riscv_vcreate_v_u16m4x2
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// __riscv_vcreate_v_u8m1x3
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// __riscv_vcreate_v_u8m1x4
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// __riscv_vcreate_v_u8m2x2
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// __riscv_vcreate_v_u8m2x3
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// __riscv_vcreate_v_u8m2x4
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// __riscv_vcreate_v_u8m4x2
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#if defined(LIBYUV_RVV_HAS_VCREATE)
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#define HAS_AB64TOARGBROW_RVV
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#define HAS_AR64TOAB64ROW_RVV
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#define HAS_ARGBATTENUATEROW_RVV
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@ -944,7 +919,6 @@ extern "C" {
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#define HAS_RGB24TOARGBROW_RVV
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#define HAS_RGBATOARGBROW_RVV
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#endif
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#endif
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#if defined(_MSC_VER) && !defined(__CLR_VER) && !defined(__clang__)
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#if defined(VISUALC_HAS_AVX2)
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@ -151,19 +151,9 @@ extern "C" {
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#define HAS_SCALEROWDOWN34_LSX
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#endif
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// The following are available on RVV with 64 bit elements
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// TODO: Update compiler to support 64 bit
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv_vector) && \
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defined(__riscv_zve64x)
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv_vector)
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#define HAS_SCALEUVROWDOWN4_RVV
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#define HAS_SCALEARGBROWDOWN2_RVV
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#endif
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv_vector) && \
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defined(__riscv_v_intrinsic)
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// The following are available on RVV v0.11 and RVV v1.0
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// TODO: Port to RVV v0.12
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#if __riscv_v_intrinsic == 11000 || __riscv_v_intrinsic >= 100000
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#define HAS_SCALEROWDOWN34_0_BOX_RVV
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#define HAS_SCALEROWDOWN34_1_BOX_RVV
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#define HAS_SCALEROWDOWN38_2_BOX_RVV
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@ -190,13 +180,8 @@ extern "C" {
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#define HAS_SCALEUVROWDOWN2_RVV
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#define HAS_SCALEUVROWDOWN2BOX_RVV
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#define HAS_SCALEUVROWDOWN2LINEAR_RVV
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#endif
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// The following are available on RVV v0.11
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#if __riscv_v_intrinsic == 11000
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#define HAS_SCALEARGBFILTERCOLS_RVV
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#endif
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#endif
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// Scale ARGB vertically with bilinear interpolation.
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void ScalePlaneVertical(int src_height,
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@ -11,6 +11,6 @@
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#ifndef INCLUDE_LIBYUV_VERSION_H_
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#define INCLUDE_LIBYUV_VERSION_H_
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#define LIBYUV_VERSION 1971
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#define LIBYUV_VERSION 1972
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#endif // INCLUDE_LIBYUV_VERSION_H_
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@ -304,7 +304,7 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
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int flag = 0;
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FILE* f = fopen(cpuinfo_name, "re");
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if (!f) {
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#if defined(__riscv_vector)
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv) && __riscv_xlen == 64
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// Assume RVV if /proc/cpuinfo is unavailable.
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// This will occur for Chrome sandbox for Pepper or Render process.
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return kCpuHasRVV;
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@ -364,7 +364,7 @@ LIBYUV_API SAFEBUFFERS int RiscvCpuCaps(const char* cpuinfo_name) {
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}
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}
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}
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#if defined(__riscv_vector)
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#if !defined(LIBYUV_DISABLE_RVV) && defined(__riscv) && __riscv_xlen == 64
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// Assume RVV if /proc/cpuinfo is from x86 host running QEMU.
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else if ((memcmp(cpuinfo_line, "vendor_id\t: GenuineIntel", 24) == 0) ||
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(memcmp(cpuinfo_line, "vendor_id\t: AuthenticAMD", 24) == 0)) {
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3466
source/row_rvv.cc
3466
source/row_rvv.cc
File diff suppressed because it is too large
Load Diff
2716
source/scale_rvv.cc
2716
source/scale_rvv.cc
File diff suppressed because it is too large
Load Diff
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