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Add SVE2 and SME implementations of I422ToAR30Row
This can make use of the existing load/convert/store macros that are already present for other kernels, so add I422ToAR30Row_SVE2 and I422ToAR30Row_SME to match the existing kernels. Reduction in time taken observed for the new SVE2 implementation, compared to the existing Neon implementation: Cortex-A510: -9.1% Cortex-A520: +6.8% (!) Cortex-A710: -4.0% Cortex-A715: -1.1% Cortex-A720: -1.1% Cortex-X2: -5.7% Cortex-X3: -5.9% Cortex-X4: -2.8% Cortex-X925: -4.0% Change-Id: Ibf8bfaaeaba51f426649ded621cb0c8948dd9ee1 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6592332 Reviewed-by: Frank Barchard <fbarchard@chromium.org>
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@ -589,6 +589,7 @@ extern "C" {
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#define HAS_I410TOAR30ROW_SVE2
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#define HAS_I410TOAR30ROW_SVE2
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#define HAS_I410TOARGBROW_SVE2
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#define HAS_I410TOARGBROW_SVE2
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#define HAS_I422ALPHATOARGBROW_SVE2
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#define HAS_I422ALPHATOARGBROW_SVE2
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#define HAS_I422TOAR30ROW_SVE2
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#define HAS_I422TOARGB1555ROW_SVE2
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#define HAS_I422TOARGB1555ROW_SVE2
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#define HAS_I422TOARGB4444ROW_SVE2
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#define HAS_I422TOARGB4444ROW_SVE2
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#define HAS_I422TOARGBROW_SVE2
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#define HAS_I422TOARGBROW_SVE2
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@ -632,6 +633,7 @@ extern "C" {
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#define HAS_I410TOAR30ROW_SME
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#define HAS_I410TOAR30ROW_SME
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#define HAS_I410TOARGBROW_SME
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#define HAS_I410TOARGBROW_SME
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#define HAS_I422ALPHATOARGBROW_SME
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#define HAS_I422ALPHATOARGBROW_SME
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#define HAS_I422TOAR30ROW_SME
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#define HAS_I422TOARGB1555ROW_SME
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#define HAS_I422TOARGB1555ROW_SME
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#define HAS_I422TOARGB4444ROW_SME
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#define HAS_I422TOARGB4444ROW_SME
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#define HAS_I422TOARGBROW_SME
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#define HAS_I422TOARGBROW_SME
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@ -1363,6 +1365,18 @@ void I422ToAR30Row_NEON(const uint8_t* src_y,
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uint8_t* dst_argb,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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const struct YuvConstants* yuvconstants,
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int width);
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int width);
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void I422ToAR30Row_SVE2(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_v,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width);
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void I422ToAR30Row_SME(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_v,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width);
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void I444AlphaToARGBRow_NEON(const uint8_t* src_y,
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void I444AlphaToARGBRow_NEON(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_u,
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const uint8_t* src_v,
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const uint8_t* src_v,
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@ -769,6 +769,53 @@ static inline void I422ToRGBARow_SVE_SC(const uint8_t* src_y,
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: "cc", "memory", YUVTORGB_SVE_REGS);
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: "cc", "memory", YUVTORGB_SVE_REGS);
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}
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}
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static inline void I422ToAR30Row_SVE_SC(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_v,
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uint8_t* dst_ar30,
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const struct YuvConstants* yuvconstants,
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int width) STREAMING_COMPATIBLE {
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uint64_t vl;
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// The limit is used for saturating the 2.14 red channel in STOREAR30_SVE.
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const uint16_t limit = 0x3ff0;
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asm volatile(
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"cnth %[vl] \n"
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"ptrue p0.b \n" //
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YUVTORGB_SVE_SETUP
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"dup z19.b, #255 \n" // Alpha
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"dup z23.h, %w[limit] \n"
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"subs %w[width], %w[width], %w[vl] \n"
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"b.le 2f \n"
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// Run bulk of computation with an all-true predicate to avoid predicate
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// generation overhead.
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"ptrue p1.h \n"
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"1: \n" //
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READYUV422_SVE I4XXTORGB_SVE STOREAR30_SVE
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"subs %w[width], %w[width], %w[vl] \n"
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"b.gt 1b \n"
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// Calculate a predicate for the final iteration to deal with the tail.
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"2: \n"
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"adds %w[width], %w[width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p1.h, wzr, %w[width] \n" //
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READYUV422_SVE I4XXTORGB_SVE STOREAR30_SVE
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"99: \n"
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: [src_y] "+r"(src_y), // %[src_y]
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[src_u] "+r"(src_u), // %[src_u]
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[src_v] "+r"(src_v), // %[src_v]
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[dst_ar30] "+r"(dst_ar30), // %[dst_ar30]
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[width] "+r"(width), // %[width]
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[vl] "=&r"(vl) // %[vl]
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: [kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[limit] "r"(limit) // %[limit]
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: "cc", "memory", YUVTORGB_SVE_REGS);
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}
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static inline void I422AlphaToARGBRow_SVE_SC(
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static inline void I422AlphaToARGBRow_SVE_SC(
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const uint8_t* src_y,
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const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_u,
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@ -6710,6 +6710,16 @@ int I420ToAR30Matrix(const uint8_t* src_y,
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}
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}
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}
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}
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#endif
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#endif
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#if defined(HAS_I422TOAR30ROW_SVE2)
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if (TestCpuFlag(kCpuHasSVE2)) {
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I422ToAR30Row = I422ToAR30Row_SVE2;
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}
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#endif
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#if defined(HAS_I422TOAR30ROW_SME)
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if (TestCpuFlag(kCpuHasSME)) {
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I422ToAR30Row = I422ToAR30Row_SME;
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}
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#endif
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for (y = 0; y < height; ++y) {
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for (y = 0; y < height; ++y) {
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I422ToAR30Row(src_y, src_u, src_v, dst_ar30, yuvconstants, width);
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I422ToAR30Row(src_y, src_u, src_v, dst_ar30, yuvconstants, width);
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@ -158,6 +158,16 @@ __arm_locally_streaming void I422ToRGBARow_SME(
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I422ToRGBARow_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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I422ToRGBARow_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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}
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}
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__arm_locally_streaming void I422ToAR30Row_SME(
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const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_v,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width) {
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I422ToAR30Row_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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}
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__arm_locally_streaming void I422AlphaToARGBRow_SME(
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__arm_locally_streaming void I422AlphaToARGBRow_SME(
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const uint8_t* src_y,
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const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_u,
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@ -154,6 +154,15 @@ void I422ToRGBARow_SVE2(const uint8_t* src_y,
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I422ToRGBARow_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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I422ToRGBARow_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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}
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}
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void I422ToAR30Row_SVE2(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_v,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width) {
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I422ToAR30Row_SVE_SC(src_y, src_u, src_v, dst_argb, yuvconstants, width);
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}
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void I422AlphaToARGBRow_SVE2(const uint8_t* src_y,
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void I422AlphaToARGBRow_SVE2(const uint8_t* src_y,
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const uint8_t* src_u,
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const uint8_t* src_u,
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const uint8_t* src_v,
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const uint8_t* src_v,
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