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Experimental SVE FMMLA detect

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Detect if arm cpu support FMMLA instruction

Bug: None
Change-Id: Ia7b83bf2735ddeeb8a85da44177e708c34e4b1fb
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/7085486
Reviewed-by: Wan-Teh Chang <wtc@google.com>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
Frank Barchard 2025-10-27 14:15:48 -07:00 committed by libyuv LUCI CQ
parent 500f45652c
commit 900da61d3c
4 changed files with 9 additions and 0 deletions
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1
include/libyuv/cpu_id.h
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@ -30,6 +30,7 @@ static const int kCpuHasSVE = 0x800;
static const int kCpuHasSVE2 = 0x1000;
static const int kCpuHasSME = 0x2000;
static const int kCpuHasSME2 = 0x4000;
static const int kCpuHasSVEF32MM = 0x8000;
// These flags are only valid on RISCV processors.
static const int kCpuHasRISCV = 0x4;

4
source/cpu_id.cc
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@ -185,6 +185,7 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
#define YUV_AARCH64_HWCAP_ASIMDDP (1UL << 20)
#define YUV_AARCH64_HWCAP_SVE (1UL << 22)
#define YUV_AARCH64_HWCAP2_SVE2 (1UL << 1)
#define YUV_AARCH64_HWCAP2_SVEF32MM (1UL << 10)
#define YUV_AARCH64_HWCAP2_I8MM (1UL << 13)
#define YUV_AARCH64_HWCAP2_SME (1UL << 23)
#define YUV_AARCH64_HWCAP2_SME2 (1UL << 37)
@ -207,6 +208,9 @@ LIBYUV_API SAFEBUFFERS int AArch64CpuCaps(unsigned long hwcap,
features |= kCpuHasNeonI8MM;
if (hwcap & YUV_AARCH64_HWCAP_SVE) {
features |= kCpuHasSVE;
if (hwcap2 & YUV_AARCH64_HWCAP2_SVEF32MM) {
features |= kCpuHasSVEF32MM;
}
if (hwcap2 & YUV_AARCH64_HWCAP2_SVE2) {
features |= kCpuHasSVE2;
}

2
unit_test/cpu_test.cc
View File

@ -100,6 +100,7 @@ TEST_F(LibYUVBaseTest, TestCpuHas) {
int has_neon_i8mm = TestCpuFlag(kCpuHasNeonI8MM);
int has_sve = TestCpuFlag(kCpuHasSVE);
int has_sve2 = TestCpuFlag(kCpuHasSVE2);
int has_sve_f32mm = TestCpuFlag(kCpuHasSVEF32MM);
int has_sme = TestCpuFlag(kCpuHasSME);
int has_sme2 = TestCpuFlag(kCpuHasSME2);
printf("Has Arm 0x%x\n", has_arm);
@ -108,6 +109,7 @@ TEST_F(LibYUVBaseTest, TestCpuHas) {
printf("Has Neon I8MM 0x%x\n", has_neon_i8mm);
printf("Has SVE 0x%x\n", has_sve);
printf("Has SVE2 0x%x\n", has_sve2);
printf("Has SVE F32MM 0x%x\n", has_sve_f32mm);
printf("Has SME 0x%x\n", has_sme);
printf("Has SME2 0x%x\n", has_sme2);

2
util/cpuid.c
View File

@ -60,6 +60,7 @@ int main(int argc, const char* argv[]) {
int has_neon_i8mm = TestCpuFlag(kCpuHasNeonI8MM);
int has_sve = TestCpuFlag(kCpuHasSVE);
int has_sve2 = TestCpuFlag(kCpuHasSVE2);
int has_sve_f32mm = TestCpuFlag(kCpuHasSVEF32MM);
int has_sme = TestCpuFlag(kCpuHasSME);
int has_sme2 = TestCpuFlag(kCpuHasSME2);
printf("Has Arm 0x%x\n", has_arm);
@ -68,6 +69,7 @@ int main(int argc, const char* argv[]) {
printf("Has Neon I8MM 0x%x\n", has_neon_i8mm);
printf("Has SVE 0x%x\n", has_sve);
printf("Has SVE2 0x%x\n", has_sve2);
printf("Has SVE F32MM 0x%x\n", has_sve_f32mm);
printf("Has SME 0x%x\n", has_sme);
printf("Has SME2 0x%x\n", has_sme2);