From b16233e3d4432f76e3fcdbff0731a2f6dc147ffa Mon Sep 17 00:00:00 2001 From: Gerrit User 1115898 <1115898@3ce6091f-6c88-37e8-8c75-72f92ae8dfba> Date: Wed, 10 Dec 2025 10:37:13 -0800 Subject: [PATCH] Update patch set 3 Patch Set 3: Code-Review+1 Commit-Queue+2 (2 comments) Patch-set: 3 Reviewer: Gerrit User 1526622 <1526622@3ce6091f-6c88-37e8-8c75-72f92ae8dfba> Reviewer: Gerrit User 1115898 <1115898@3ce6091f-6c88-37e8-8c75-72f92ae8dfba> Label: Code-Review=+1, 3a305fd64ac477ba1dbc9e0eb61a73f870ef3d21 Label: Commit-Queue=+2, 09228e841d0a07a4b8a8f49af8b3467d76f8821a Attention: {"person_ident":"Gerrit User 1526622 \u003c1526622@3ce6091f-6c88-37e8-8c75-72f92ae8dfba\u003e","operation":"ADD","reason":"\u003cGERRIT_ACCOUNT_1115898\u003e replied on the change"} Attention: {"person_ident":"Gerrit User 1115898 \u003c1115898@3ce6091f-6c88-37e8-8c75-72f92ae8dfba\u003e","operation":"REMOVE","reason":"\u003cGERRIT_ACCOUNT_1115898\u003e replied on the change"} Attention: {"person_ident":"Gerrit User 4524974 \u003c4524974@3ce6091f-6c88-37e8-8c75-72f92ae8dfba\u003e","operation":"ADD","reason":"\u003cGERRIT_ACCOUNT_1115898\u003e replied on the change"} --- 3d5b135c3da4d0813d212ac6652f65d5970d169d | 21 +++++++++++++++++++++ a47e0c8cf4f28716867fb070146632e6add22c2b | 18 ++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 3d5b135c3da4d0813d212ac6652f65d5970d169d diff --git a/3d5b135c3da4d0813d212ac6652f65d5970d169d b/3d5b135c3da4d0813d212ac6652f65d5970d169d new file mode 100644 index 000000000..7e764e8cc --- /dev/null +++ b/3d5b135c3da4d0813d212ac6652f65d5970d169d @@ -0,0 +1,21 @@ +{ + "comments": [ + { + "unresolved": false, + "key": { + "uuid": "834c7d9a_69e5dac8", + "filename": "/PATCHSET_LEVEL", + "patchSetId": 3 + }, + "lineNbr": 0, + "author": { + "id": 1115898 + }, + "writtenOn": "2025-12-10T18:37:13Z", + "side": 1, + "message": "Looks good... needs another reviewer to land.\n2 followups (separate change if you like)\n1. row_rvv.cc has the same ifdef\n// This module is for clang rvv. GCC hasn\u0027t supported segment load \u0026 store.\n#if !defined(LIBYUV_DISABLE_RVV) \u0026\u0026 defined(__riscv_vector) \u0026\u0026 \\\n defined(__clang__)\n2. the headers such scale_row.h and row.h should match\non arm/x86 I have cpu_support.h sets a macro to indicate each compiler has support for the ISA using version checks\nThen in row.h and example row function like this:\n#if !defined(LIBYUV_DISABLE_X86) \u0026\u0026 \\\n (defined(VISUALC_HAS_AVX2) || defined(CLANG_HAS_AVX2) || \\\n defined(GCC_HAS_AVX2))\n#define HAS_ARGBCOPYALPHAROW_AVX2\nIn the row_gcc.cc and all usage of the row function, the individual HAS_ is used, allowing fine grained row functions to be enabled/disabled.\n\nSo far it hasnt been necessary on RVV but this would be how GCC and future compilers could check if they support RVV or specific extensions (eg fp16) and enable some selectively.\nTo figure out the versions, I use godbolt with some sample code.", + "revId": "3d5b135c3da4d0813d212ac6652f65d5970d169d", + "serverId": "3ce6091f-6c88-37e8-8c75-72f92ae8dfba" + } + ] +} \ No newline at end of file diff --git a/a47e0c8cf4f28716867fb070146632e6add22c2b b/a47e0c8cf4f28716867fb070146632e6add22c2b index 34205b64e..6e1d0aeed 100644 --- a/a47e0c8cf4f28716867fb070146632e6add22c2b +++ b/a47e0c8cf4f28716867fb070146632e6add22c2b @@ -68,6 +68,24 @@ "parentUuid": "76088842_309ed602", "revId": "a47e0c8cf4f28716867fb070146632e6add22c2b", "serverId": "3ce6091f-6c88-37e8-8c75-72f92ae8dfba" + }, + { + "unresolved": false, + "key": { + "uuid": "c2a57d99_4f2391e9", + "filename": "source/row_rvv.cc", + "patchSetId": 2 + }, + "lineNbr": 21, + "author": { + "id": 1115898 + }, + "writtenOn": "2025-12-10T18:37:13Z", + "side": 1, + "message": "Na... lets let all compilers attempt to do RVV.", + "parentUuid": "795f8f00_eda31d03", + "revId": "a47e0c8cf4f28716867fb070146632e6add22c2b", + "serverId": "3ce6091f-6c88-37e8-8c75-72f92ae8dfba" } ] } \ No newline at end of file