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[AArch64] Fix compilation due to incorrect register constraint

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The y0_fraction and y1_fraction variables in InterpolateRow_NEON were
marked as modified by the inline-asm block, however
5eea7812826c551559fdcd4a6988fcf1fbe341f6 marked these variables as
`const` which caused both LLVM and GCC to emit errors about modification
of const variables.

There is no need for these variables to be modified in the loop since
they are read-only, so simply update the inline asm block constraints to
match.

Change-Id: I94ca3696c4163ede6ad27d645f0f445fcfb0a1c3
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6818289
Reviewed-by: Justin Green <greenjustin@google.com>
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
George Steed 2025-08-05 16:51:40 +01:00 committed by Frank Barchard
parent 5eea781282
commit b7d97d5f3f
1 changed files with 6 additions and 7 deletions
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13
source/row_neon64.cc
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@ -4032,13 +4032,12 @@ void InterpolateRow_NEON(uint8_t* dst_ptr,
"b.gt 100b \n" "b.gt 100b \n"
"99: \n" "99: \n"
: "+r"(dst_ptr), // %0 : "+r"(dst_ptr), // %0
"+r"(src_ptr), // %1 "+r"(src_ptr), // %1
"+r"(src_ptr1), // %2 "+r"(src_ptr1), // %2
"+r"(dst_width), // %3 "+r"(dst_width) // %3
"+r"(y1_fraction), // %4 : "r"(y1_fraction), // %4
"+r"(y0_fraction) // %5 "r"(y0_fraction) // %5
:
: "cc", "memory", "v0", "v1", "v3", "v4", "v5"); : "cc", "memory", "v0", "v1", "v3", "v4", "v5");
} }