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ifdef to wrap mips

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BUG=none
TEST=none
Review URL: https://webrtc-codereview.appspot.com/974012

git-svn-id: http://libyuv.googlecode.com/svn/trunk@513 16f28f9a-4ce2-e073-06de-1de4eb20be90
This commit is contained in:
fbarchard@google.com 2012-12-11 17:27:33 +00:00
parent 62154e53a2
commit b91b53481c
4 changed files with 10 additions and 3 deletions
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2
README.chromium
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@ -1,6 +1,6 @@
Name: libyuv
URL: http://code.google.com/p/libyuv/
Version: 512
Version: 513
License: BSD
License File: LICENSE

2
include/libyuv/version.h
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@ -11,6 +11,6 @@
#ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT
#define INCLUDE_LIBYUV_VERSION_H_
#define LIBYUV_VERSION 512
#define LIBYUV_VERSION 513
#endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT

8
source/row_mips.cc
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@ -324,6 +324,7 @@ void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
// t8 = | 0 | G1 | 0 | g1 |
// t2 = | 0 | R0 | 0 | r0 |
// t1 = | 0 | R1 | 0 | r1 |
#if !defined(YUV_DISABLE_ASM) && defined(__mips__) && defined(__mips_dsp) && (__mips_dsp_rev >= 2)
#define I422ToTransientMipsRGB \
"lw $t0, 0(%[y_buf]) \n" \
"lhu $t1, 0(%[u_buf]) \n" \
@ -382,7 +383,9 @@ void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
"addu.ph $t8, $t8, $s5 \n" \
"addu.ph $t2, $t2, $s5 \n" \
"addu.ph $t1, $t1, $s5 \n"
#endif
#ifdef HAS_I422TOARGBROW_MIPS_DSPR2
void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf,
const uint8* u_buf,
const uint8* v_buf,
@ -442,7 +445,9 @@ void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf,
"s4", "s5", "s6"
);
}
#endif // HAS_I422TOARGBROW_MIPS_DSPR2
#ifdef HAS_I422TOABGRROW_MIPS_DSPR2
void I422ToABGRRow_MIPS_DSPR2(const uint8* y_buf,
const uint8* u_buf,
const uint8* v_buf,
@ -502,7 +507,9 @@ void I422ToABGRRow_MIPS_DSPR2(const uint8* y_buf,
"s4", "s5", "s6"
);
}
#endif // HAS_I422TOABGRROW_MIPS_DSPR2
#ifdef HAS_I422TOBGRAROW_MIPS_DSPR2
void I422ToBGRARow_MIPS_DSPR2(const uint8* y_buf,
const uint8* u_buf,
const uint8* v_buf,
@ -564,6 +571,7 @@ void I422ToBGRARow_MIPS_DSPR2(const uint8* y_buf,
"s4", "s5", "s6"
);
}
#endif // HAS_I422TOBGRAROW_MIPS_DSPR2
#endif // __mips__

1
source/row_x86.asm
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@ -136,4 +136,3 @@ MergeUVRow_ u,_Unaligned
INIT_YMM AVX2
MergeUVRow_ a,
MergeUVRow_ u,_Unaligned