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I420ToAR30 add avx512bw support

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Benchmark for 720p 1000 images
CPU Architecture          AVX2 (us)   AVX512 (us)   Speedup    Change
---------------------------------------------------------------------
Intel Skylake                325          229        1.42x     -29.5%
Intel Cascade Lake           289          213        1.36x     -26.3%
Intel Granite Rapids         209          168        1.24x     -19.6%
AMD Zen 4                    168          165        1.02x      -1.8%
AMD Zen 5 (Turin)            180          112        1.61x     -37.8%

Bug: None
Change-Id: I3d07c9b36196305ba7ff63973246c080ff872367
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8251940
Reviewed-by: richard winterton <rrwinterton@gmail.com>
Commit-Queue: Frank Barchard <fbarchard@google.com>
Reviewed-by: Dale Curtis <dalecurtis@chromium.org>
This commit is contained in:
Frank Barchard 2026-08-13 12:44:06 -07:00
parent 3f42e3840b
commit c20b35a7bc
6 changed files with 99 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.chromium
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@ -1,6 +1,6 @@
Name: libyuv
URL: https://chromium.googlesource.com/libyuv/libyuv/
Version: 1957
Version: 1958
Revision: DEPS
License: BSD-3-Clause
License File: LICENSE

13
include/libyuv/row.h
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@ -393,6 +393,7 @@ extern "C" {
#if !defined(LIBYUV_DISABLE_X86) && \
(defined(__x86_64__) || defined(_M_X64)) && defined(CLANG_HAS_AVX512)
#define HAS_I422TOARGBROW_AVX512BW
#define HAS_I422TOAR30ROW_AVX512BW
#define HAS_ARGBSHUFFLEROW_AVX512BW
#define HAS_ARGBTOUV444MATRIXROW_AVX512BW
#define HAS_RGBTOUV444MATRIXROW_AVX512BW
@ -4465,6 +4466,12 @@ void I422ToARGBRow_AVX512BW(const uint8_t* y_buf,
uint8_t* dst_argb,
const struct YuvConstants* yuvconstants,
int width);
void I422ToAR30Row_AVX512BW(const uint8_t* y_buf,
const uint8_t* u_buf,
const uint8_t* v_buf,
uint8_t* dst_ar30,
const struct YuvConstants* yuvconstants,
int width);
void I422ToRGBARow_AVX2(const uint8_t* y_buf,
const uint8_t* u_buf,
const uint8_t* v_buf,
@ -4793,6 +4800,12 @@ void I422ToARGBRow_Any_AVX512BW(const uint8_t* y_buf,
uint8_t* dst_ptr,
const struct YuvConstants* yuvconstants,
int width);
void I422ToAR30Row_Any_AVX512BW(const uint8_t* y_buf,
const uint8_t* u_buf,
const uint8_t* v_buf,
uint8_t* dst_ptr,
const struct YuvConstants* yuvconstants,
int width);
void I422ToRGBARow_Any_AVX2(const uint8_t* y_buf,
const uint8_t* u_buf,
const uint8_t* v_buf,

2
include/libyuv/version.h
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@ -11,6 +11,6 @@
#ifndef INCLUDE_LIBYUV_VERSION_H_
#define INCLUDE_LIBYUV_VERSION_H_
#define LIBYUV_VERSION 1957
#define LIBYUV_VERSION 1958
#endif // INCLUDE_LIBYUV_VERSION_H_

9
source/convert_argb.cc
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@ -6512,6 +6512,15 @@ int I420ToAR30Matrix(const uint8_t* src_y,
}
}
#endif
#if defined(HAS_I422TOAR30ROW_AVX512BW)
if (TestCpuFlag(kCpuHasAVX512BW | kCpuHasAVX512VL) ==
(kCpuHasAVX512BW | kCpuHasAVX512VL)) {
I422ToAR30Row = I422ToAR30Row_Any_AVX512BW;
if (IS_ALIGNED(width, 32)) {
I422ToAR30Row = I422ToAR30Row_AVX512BW;
}
}
#endif
#if defined(HAS_I422TOAR30ROW_NEON)
if (TestCpuFlag(kCpuHasNEON)) {
I422ToAR30Row = I422ToAR30Row_Any_NEON;

3
source/row_any.cc
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@ -398,6 +398,9 @@ ANY31C(I422ToAR30Row_Any_SSSE3, I422ToAR30Row_SSSE3, 1, 0, 4, 7)
#ifdef HAS_I422TOAR30ROW_AVX2
ANY31C(I422ToAR30Row_Any_AVX2, I422ToAR30Row_AVX2, 1, 0, 4, 15)
#endif
#ifdef HAS_I422TOAR30ROW_AVX512BW
ANY31C(I422ToAR30Row_Any_AVX512BW, I422ToAR30Row_AVX512BW, 1, 0, 4, 31)
#endif
#ifdef HAS_I444TOARGBROW_SSSE3
ANY31C(I444ToARGBRow_Any_SSSE3, I444ToARGBRow_SSSE3, 0, 0, 4, 7)
#endif

72
source/row_gcc.cc
View File

@ -3436,6 +3436,33 @@ void OMITFP I422ToRGBARow_SSSE3(const uint8_t* y_buf,
"vmovups %%zmm0,0x40(%[dst_argb]) \n" \
"lea 0x80(%[dst_argb]), %[dst_argb] \n"
// Store 32 AR30 values.
#define STOREAR30_AVX512BW \
"vpsraw $0x4,%%zmm0,%%zmm0 \n" \
"vpsraw $0x4,%%zmm1,%%zmm1 \n" \
"vpsraw $0x4,%%zmm2,%%zmm2 \n" \
"vpminsw %%zmm7,%%zmm0,%%zmm0 \n" \
"vpminsw %%zmm7,%%zmm1,%%zmm1 \n" \
"vpminsw %%zmm7,%%zmm2,%%zmm2 \n" \
"vpmaxsw %%zmm6,%%zmm0,%%zmm0 \n" \
"vpmaxsw %%zmm6,%%zmm1,%%zmm1 \n" \
"vpmaxsw %%zmm6,%%zmm2,%%zmm2 \n" \
"vpsllw $0x4,%%zmm2,%%zmm2 \n" \
"vpermq %%zmm0,%%zmm18,%%zmm0 \n" \
"vpermq %%zmm1,%%zmm18,%%zmm1 \n" \
"vpermq %%zmm2,%%zmm18,%%zmm2 \n" \
"vpunpckhwd %%zmm2,%%zmm0,%%zmm3 \n" \
"vpunpcklwd %%zmm2,%%zmm0,%%zmm0 \n" \
"vpunpckhwd %%zmm5,%%zmm1,%%zmm2 \n" \
"vpunpcklwd %%zmm5,%%zmm1,%%zmm1 \n" \
"vpslld $0xa,%%zmm1,%%zmm1 \n" \
"vpslld $0xa,%%zmm2,%%zmm2 \n" \
"vpord %%zmm1,%%zmm0,%%zmm0 \n" \
"vpord %%zmm2,%%zmm3,%%zmm3 \n" \
"vmovdqu32 %%zmm0,(%[dst_ar30]) \n" \
"vmovdqu32 %%zmm3,0x40(%[dst_ar30]) \n" \
"lea 0x80(%[dst_ar30]), %[dst_ar30] \n"
// Store 16 AR30 values.
#define STOREAR30_AVX2 \
"vpsraw $0x4,%%ymm0,%%ymm0 \n" \
@ -3705,6 +3732,51 @@ void OMITFP I422ToRGB24Row_AVX512VBMI(const uint8_t* y_buf,
}
#endif // HAS_I422TORGB24ROW_AVX512VBMI
#if defined(HAS_I422TOAR30ROW_AVX512BW)
// 32 pixels
// 16 UV values upsampled to 32 UV, mixed with 32 Y producing 32 AR30 (128
// bytes).
void OMITFP I422ToAR30Row_AVX512BW(const uint8_t* y_buf,
const uint8_t* u_buf,
const uint8_t* v_buf,
uint8_t* dst_ar30,
const struct YuvConstants* yuvconstants,
int width) {
asm volatile (
YUVTORGB_SETUP_AVX512BW(yuvconstants)
"sub %[u_buf],%[v_buf] \n"
"vpcmpeqb %%ymm5,%%ymm5,%%ymm5 \n" // AR30 constants
"vpsrlw $14,%%ymm5,%%ymm5 \n"
"vpsllw $4,%%ymm5,%%ymm5 \n" // 2 alpha bits
"vpbroadcastq %%xmm5,%%zmm5 \n"
"vpxord %%zmm6,%%zmm6,%%zmm6 \n" // 0 for min
"vpternlogd $0xff,%%zmm7,%%zmm7,%%zmm7 \n" // 1023 for max
"vpsrlw $6,%%zmm7,%%zmm7 \n"
LABELALIGN
"1: \n"
READYUV422_AVX512BW
YUVTORGB16_AVX512BW(yuvconstants)
STOREAR30_AVX512BW
"sub $0x20,%[width] \n"
"jg 1b \n"
"vzeroupper \n"
: [y_buf]"+r"(y_buf), // %[y_buf]
[u_buf]"+r"(u_buf), // %[u_buf]
[v_buf]"+r"(v_buf), // %[v_buf]
[dst_ar30]"+r"(dst_ar30), // %[dst_ar30]
[width]"+rm"(width) // %[width]
: [yuvconstants]"r"(yuvconstants), // %[yuvconstants]
[quadsplitperm]"r"(kSplitQuadWords), // %[quadsplitperm]
[dquadsplitperm]"r"(kSplitDoubleQuadWords), // %[dquadsplitperm]
[unperm]"r"(kUnpermuteAVX512) // %[unperm]
: "memory", "cc", YUVTORGB_REGS_AVX512BW
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"
);
}
#endif // HAS_I422TOAR30ROW_AVX512BW
#endif // HAS_I422TOARGBROW_AVX512BW
#if defined(HAS_I422TOAR30ROW_AVX2)