From c6ed1b8f0edcc9fb49897ac71198b149491a7493 Mon Sep 17 00:00:00 2001 From: Stephan Hartmann Date: Thu, 27 May 2021 15:18:36 +0000 Subject: [PATCH] GCC: force memory address without offset on aarch64 With "m" GCC generates a memory address with offset which is not allowed with ld1 on aarch64. Change constraint to "Q" to force address without offset. Bug: chromium:819294, libyuv:903 Change-Id: Iaae24bc6882cdef823259040a37fdbfc31f91185 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/2922146 Reviewed-by: Frank Barchard --- source/row_neon64.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/source/row_neon64.cc b/source/row_neon64.cc index da7e3c7cd..b9fafd8d2 100644 --- a/source/row_neon64.cc +++ b/source/row_neon64.cc @@ -1726,7 +1726,7 @@ void ARGBToAB64Row_NEON(const uint8_t* src_argb, : "+r"(src_argb), // %0 "+r"(dst_ab64), // %1 "+r"(width) // %2 - : "m"(kShuffleARGBToABGR) // %3 + : "Q"(kShuffleARGBToABGR) // %3 : "cc", "memory", "v0", "v1", "v2", "v3", "v4"); } @@ -1750,7 +1750,7 @@ void AR64ToARGBRow_NEON(const uint16_t* src_ar64, : "+r"(src_ar64), // %0 "+r"(dst_argb), // %1 "+r"(width) // %2 - : "m"(kShuffleAR64ToARGB) // %3 + : "Q"(kShuffleAR64ToARGB) // %3 : "cc", "memory", "v0", "v1", "v2", "v3", "v4"); } @@ -1774,7 +1774,7 @@ void AB64ToARGBRow_NEON(const uint16_t* src_ab64, : "+r"(src_ab64), // %0 "+r"(dst_argb), // %1 "+r"(width) // %2 - : "m"(kShuffleAB64ToARGB) // %3 + : "Q"(kShuffleAB64ToARGB) // %3 : "cc", "memory", "v0", "v1", "v2", "v3", "v4"); }