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Add unittest TestLinuxMipsMsaMmi.

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This unittest help to test MipsCpuCaps.

Change-Id: I9e0ceeed0e5243446eaafa27e8de4c5f8163b09e
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/2133314
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
Shiyou Yin 2020-04-02 09:28:48 +08:00 committed by Commit Bot
parent f813b8a810
commit ca954a3419
8 changed files with 55 additions and 1 deletions
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2
include/libyuv/cpu_id.h
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@ -71,6 +71,8 @@ static __inline int TestCpuFlag(int test_flag) {
// Internal function for parsing /proc/cpuinfo.
LIBYUV_API
int ArmCpuCaps(const char* cpuinfo_name);
LIBYUV_API
int MipsCpuCaps(const char* cpuinfo_name);
// For testing, allow CPU flags to be disabled.
// ie MaskCpuFlags(~kCpuHasSSSE3) to disable SSSE3.

1
source/cpu_id.cc
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@ -163,7 +163,6 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
}
// TODO(fbarchard): Consider read_msa_ir().
// TODO(fbarchard): Add unittest.
LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
char cpuinfo_line[512];
int flag = 0x0;

17
unit_test/cpu_test.cc
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@ -160,6 +160,23 @@ TEST_F(LibYUVBaseTest, TestLinuxNeon) {
#endif
}
TEST_F(LibYUVBaseTest, TestLinuxMipsMsaMmi) {
if (FileExists("../../unit_test/testdata/mips.txt")) {
printf("Note: testing to load \"../../unit_test/testdata/mips.txt\"\n");
EXPECT_EQ(0, MipsCpuCaps("../../unit_test/testdata/mips.txt"));
EXPECT_EQ(kCpuHasMMI,
MipsCpuCaps("../../unit_test/testdata/mips_loongson3.txt"));
EXPECT_EQ(kCpuHasMMI,
MipsCpuCaps("../../unit_test/testdata/mips_loongson_mmi.txt"));
EXPECT_EQ(kCpuHasMSA, MipsCpuCaps("../../unit_test/testdata/mips_msa.txt"));
EXPECT_EQ(kCpuHasMMI | kCpuHasMSA,
MipsCpuCaps("../../unit_test/testdata/mips_loongson2k.txt"));
} else {
printf("WARNING: unable to load \"../../unit_test/testdata/mips.txt\"\n");
}
}
// TODO(fbarchard): Fix clangcl test of cpuflags.
#ifdef _MSC_VER
TEST_F(LibYUVBaseTest, DISABLED_TestSetCpuFlags) {

7
unit_test/testdata/mips.txt vendored Normal file
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@ -0,0 +1,7 @@
system type : generic-loongson-machine
machine : loongson,generic
processor : 0
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : vz
shadow register sets : 1

5
unit_test/testdata/mips_loongson2k.txt vendored Normal file
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@ -0,0 +1,5 @@
system type : Loongson2K-SBC
machine : loongson,LS2k1000-EVP
processor : 0
cpu model : Loongson-2K V0.3 FPU V0.1
BogoMIPS : 1980.41

10
unit_test/testdata/mips_loongson3.txt vendored Normal file
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@ -0,0 +1,10 @@
system type : generic-loongson-machine
machine : Unknown
processor : 0
cpu model : ICT Loongson-3 V0.9 FPU V0.1
model name : ICT Loongson-3A R3 (Loongson-3A3000) @ 1500MHz
BogoMIPS : 2990.15
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : dsp dsp2 vz
shadow register sets : 1

7
unit_test/testdata/mips_loongson_mmi.txt vendored Normal file
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@ -0,0 +1,7 @@
system type : generic-loongson-machine
machine : loongson,generic
processor : 0
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : vz loongson-mmi loongson-ext
shadow register sets : 1

7
unit_test/testdata/mips_msa.txt vendored Normal file
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@ -0,0 +1,7 @@
system type : generic-loongson-machine
machine : loongson,generic
processor : 0
isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
ASEs implemented : vz msa
shadow register sets : 1