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[AArch64] Use LD1/ST1 rather than LD4/ST4 in ARGBMultiplyRow_NEON

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There is no need to de-interleave channels here since we are applying
the same operation across all lanes. LD4 and ST4 are known to be
significantly slower than LD1/ST1 on some micro-architectures so we
should prefer to avoid them where possible.

Reduction in runtimes observed for ARGBMultiplyRow_NEON:

 Cortex-A55: -22.3%
Cortex-A510: -56.6%
 Cortex-A76: -45.5%
  Cortex-X2: -54.6%

Change-Id: I9103111a109a4d87d358e06eb513746314aaf66a
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/5454832
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
George Steed 2024-03-24 07:01:15 +00:00 committed by libyuv LUCI CQ
parent 7266cda79c
commit ea56460300
1 changed files with 3 additions and 3 deletions
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6
source/row_neon64.cc
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@ -3779,8 +3779,8 @@ void ARGBMultiplyRow_NEON(const uint8_t* src_argb,
asm volatile(
// 8 pixel loop.
"1: \n"
"ld4 {v0.8b,v1.8b,v2.8b,v3.8b}, [%0], #32 \n" // load 8 ARGB
"ld4 {v4.8b,v5.8b,v6.8b,v7.8b}, [%1], #32 \n" // load 8 more
"ld1 {v0.8b,v1.8b,v2.8b,v3.8b}, [%0], #32 \n" // load 8 ARGB
"ld1 {v4.8b,v5.8b,v6.8b,v7.8b}, [%1], #32 \n" // load 8 more
"subs %w3, %w3, #8 \n" // 8 processed per loop.
"umull v0.8h, v0.8b, v4.8b \n" // multiply B
"prfm pldl1keep, [%0, 448] \n"
@ -3792,7 +3792,7 @@ void ARGBMultiplyRow_NEON(const uint8_t* src_argb,
"rshrn v1.8b, v1.8h, #8 \n" // 16 bit to 8 bit G
"rshrn v2.8b, v2.8h, #8 \n" // 16 bit to 8 bit R
"rshrn v3.8b, v3.8h, #8 \n" // 16 bit to 8 bit A
"st4 {v0.8b,v1.8b,v2.8b,v3.8b}, [%2], #32 \n" // store 8 ARGB
"st1 {v0.8b,v1.8b,v2.8b,v3.8b}, [%2], #32 \n" // store 8 ARGB
"b.gt 1b \n"
: "+r"(src_argb), // %0
"+r"(src_argb1), // %1