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https://chromium.googlesource.com/libyuv/libyuv
synced 2026-01-01 03:12:16 +08:00
HalfFloat neon armv7 fix for destination pointer.
Improved unittests detect different in arm64 rounding. TEST=util/android/test_runner.py gtest -s libyuv_unittest -t 7200 --verbose --release --gtest_filter=*Half* -a "--libyuv_width=640 --libyuv_height=360" BUG=libyuv:560 R=wangcheng@google.com Review URL: https://codereview.chromium.org/2478313004 .
This commit is contained in:
Frank Barchard
parent
eca08525cb
commit
f2c27dafa2
@ -1,6 +1,6 @@
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Name: libyuv
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URL: http://code.google.com/p/libyuv/
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Version: 1633
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Version: 1634
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License: BSD
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License File: LICENSE
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@ -11,6 +11,6 @@
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#ifndef INCLUDE_LIBYUV_VERSION_H_
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#define INCLUDE_LIBYUV_VERSION_H_
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#define LIBYUV_VERSION 1633
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#define LIBYUV_VERSION 1634
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#endif // INCLUDE_LIBYUV_VERSION_H_
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@ -2742,16 +2742,16 @@ void HalfFloat1Row_NEON(const uint16* src, uint16* dst, float, int width) {
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MEMACCESS(0)
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"vld1.8 {q1}, [%0]! \n" // load 8 shorts
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"subs %2, %2, #8 \n" // 8 pixels per loop
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"vmovl.u8 q2, d2 \n" // 8 int's
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"vmovl.u8 q3, d3 \n"
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"vmovl.u16 q2, d2 \n" // 8 int's
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"vmovl.u16 q3, d3 \n"
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"vcvt.f32.u32 q2, q2 \n" // 8 floats
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"vcvt.f32.u32 q3, q3 \n"
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"vmul.f32 q2, q2, q0 \n" // adjust exponent
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"vmul.f32 q3, q3, q0 \n"
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"vqshrn.u32 d2, q2, #13 \n" // isolate halffloat
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"vqshrn.u32 d2, q2, #13 \n" // isolate halffloat
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"vqshrn.u32 d3, q3, #13 \n"
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MEMACCESS(1)
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"vst1.8 {q1}, [%0]! \n"
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"vst1.8 {q1}, [%1]! \n"
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"bgt 1b \n"
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: "+r"(src), // %0
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"+r"(dst), // %1
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@ -2770,16 +2770,16 @@ void HalfFloatRow_NEON(const uint16* src, uint16* dst, float scale, int width) {
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MEMACCESS(0)
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"vld1.8 {q1}, [%0]! \n" // load 8 shorts
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"subs %2, %2, #8 \n" // 8 pixels per loop
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"vmovl.u8 q2, d2 \n" // 8 int's
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"vmovl.u8 q3, d3 \n"
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"vmovl.u16 q2, d2 \n" // 8 int's
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"vmovl.u16 q3, d3 \n"
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"vcvt.f32.u32 q2, q2 \n" // 8 floats
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"vcvt.f32.u32 q3, q3 \n"
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"vmul.f32 q2, q2, q0 \n" // adjust exponent
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"vmul.f32 q3, q3, q0 \n"
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"vqshrn.u32 d2, q2, #13 \n" // isolate halffloat
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"vqshrn.u32 d2, q2, #13 \n" // isolate halffloat
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"vqshrn.u32 d3, q3, #13 \n"
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MEMACCESS(1)
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"vst1.8 {q1}, [%0]! \n"
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"vst1.8 {q1}, [%1]! \n"
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"bgt 1b \n"
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: "+r"(src), // %0
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"+r"(dst), // %1
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@ -2711,6 +2711,7 @@ void SobelYRow_NEON(const uint8* src_y0, const uint8* src_y1,
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);
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}
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// Caveat - rounds float to half float whereas scaling version truncates.
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void HalfFloat1Row_NEON(const uint16* src, uint16* dst, float, int width) {
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asm volatile (
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"1: \n"
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@ -2721,7 +2722,7 @@ void HalfFloat1Row_NEON(const uint16* src, uint16* dst, float, int width) {
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"uxtl2 v3.4s, v1.8h \n"
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"scvtf v2.4s, v2.4s \n" // 8 floats
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"scvtf v3.4s, v3.4s \n"
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"fcvtn v1.4h, v2.4s \n" // 8 floatsgit
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"fcvtn v1.4h, v2.4s \n" // 8 half floats
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"fcvtn2 v1.8h, v3.4s \n"
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MEMACCESS(1)
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"st1 {v1.16b}, [%1], #16 \n" // store 8 shorts
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@ -2120,26 +2120,61 @@ int TestHalfFloatPlane(int benchmark_width, int benchmark_height,
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}
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opt_time = (get_time() - opt_time) / benchmark_iterations;
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int diff = 0;
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for (i = 0; i < y_plane_size; ++i) {
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diff = dst_c[i] - dst_opt[i];
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if (diff) break;
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int max_diff = 0;
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for (i = 0; i < y_plane_size / 2; ++i) {
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int abs_diff =
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abs(static_cast<int>(reinterpret_cast<uint16*>(dst_c)[i]) -
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static_cast<int>(reinterpret_cast<uint16*>(dst_opt)[i]));
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if (abs_diff > max_diff) {
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max_diff = abs_diff;
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}
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}
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free_aligned_buffer_page_end(orig_y);
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return diff;
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return max_diff;
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}
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#if defined(__arm__)
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static void EnableFlushDenormalToZero(void) {
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uint32_t cw;
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__asm__ __volatile__ (
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"vmrs %0, fpscr \n"
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"orr %0, %0, #0x1000000 \n"
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"vmsr fpscr, %0 \n"
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: "=r"(cw) :: "memory");
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}
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#endif
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// 5 bit exponent with bias of 15 will underflow to a denormal if scale causes
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// exponent to be less than 0. 15 - log2(65536) = -1/ This shouldnt normally
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// happen since scale is 1/(1<<bits) where bits is 9, 10 or 12.
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#define MAXHALFDIFF 0
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_denormal) {
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// 32 bit arm rounding on denormal case is off by 1 compared to C.
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#if defined(__arm__)
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EnableFlushDenormalToZero();
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#endif
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 65536.0f, 65535);
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EXPECT_LE(diff, MAXHALFDIFF);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_One) {
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f, 65535);
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EXPECT_LE(diff, 1);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_16bit_Opt) {
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 4096.0f, 65535);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_10bit_Opt) {
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@ -2147,7 +2182,7 @@ TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_10bit_Opt) {
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 1024.0f, 1023);
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EXPECT_LE(diff, MAXHALFDIFF);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_9bit_Opt) {
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@ -2155,7 +2190,7 @@ TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_9bit_Opt) {
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 512.0f, 511);
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EXPECT_LE(diff, MAXHALFDIFF);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_Opt) {
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@ -2163,15 +2198,7 @@ TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_Opt) {
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 4096.0f, 4095);
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EXPECT_LE(diff, MAXHALFDIFF);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_One) {
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f, 4095);
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EXPECT_LE(diff, MAXHALFDIFF);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_Offby1) {
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@ -2179,9 +2206,24 @@ TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_Offby1) {
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f / 4095.0f, 4095);
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EXPECT_LE(diff, MAXHALFDIFF);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_One) {
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f, 2047);
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EXPECT_EQ(0, diff);
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}
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TEST_F(LibYUVPlanarTest, TestHalfFloatPlane_12bit_One) {
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int diff = TestHalfFloatPlane(benchmark_width_, benchmark_height_,
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benchmark_iterations_,
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disable_cpu_flags_, benchmark_cpu_info_,
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1.0f, 4095);
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EXPECT_LE(diff, 1);
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}
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TEST_F(LibYUVPlanarTest, TestARGBLumaColorTable) {
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SIMD_ALIGNED(uint8 orig_pixels[1280][4]);
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