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Port I422ToABGR to AVX2.

Browse Source 
BUG=269
TESTED=intelsde on I422ToABGR
R=tpsiaki@google.com

Review URL: https://webrtc-codereview.appspot.com/23149004

git-svn-id: http://libyuv.googlecode.com/svn/trunk@1138 16f28f9a-4ce2-e073-06de-1de4eb20be90
This commit is contained in:
fbarchard@google.com 2014-10-23 17:20:22 +00:00
parent 22eb5965fc
commit f2fa453b94
5 changed files with 79 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
include/libyuv/row.h
View File

@ -202,6 +202,7 @@ extern "C" {
#define HAS_ARGBTOYROW_AVX2
#define HAS_I422TOARGBROW_AVX2
#define HAS_I422TORGBAROW_AVX2
#define HAS_I422TOABGRROW_AVX2
#define HAS_INTERPOLATEROW_AVX2
#define HAS_MERGEUVROW_AVX2
#define HAS_MIRRORROW_AVX2
@ -1058,6 +1059,11 @@ void I422ToRGBARow_AVX2(const uint8* src_y,
const uint8* src_v,
uint8* dst_argb,
int width);
void I422ToABGRRow_AVX2(const uint8* src_y,
const uint8* src_u,
const uint8* src_v,
uint8* dst_argb,
int width);
void I444ToARGBRow_SSSE3(const uint8* src_y,
const uint8* src_u,
const uint8* src_v,
@ -1150,6 +1156,11 @@ void I422ToRGBARow_Any_AVX2(const uint8* src_y,
const uint8* src_v,
uint8* dst_argb,
int width);
void I422ToABGRRow_Any_AVX2(const uint8* src_y,
const uint8* src_u,
const uint8* src_v,
uint8* dst_argb,
int width);
void I444ToARGBRow_Any_SSSE3(const uint8* src_y,
const uint8* src_u,
const uint8* src_v,

8
source/convert_from.cc
View File

@ -620,6 +620,14 @@ int I420ToABGR(const uint8* src_y, int src_stride_y,
}
}
#endif
#if defined(HAS_I422TOABGRROW_AVX2)
if (TestCpuFlag(kCpuHasAVX2) && width >= 16) {
I422ToABGRRow = I422ToABGRRow_Any_AVX2;
if (IS_ALIGNED(width, 16)) {
I422ToABGRRow = I422ToABGRRow_AVX2;
}
}
#endif
#if defined(HAS_I422TOABGRROW_NEON)
if (TestCpuFlag(kCpuHasNEON) && width >= 8) {
I422ToABGRRow = I422ToABGRRow_Any_NEON;

8
source/planar_functions.cc
View File

@ -886,6 +886,14 @@ int I422ToABGR(const uint8* src_y, int src_stride_y,
}
}
#endif
#if defined(HAS_I422TOABGRROW_AVX2)
if (TestCpuFlag(kCpuHasAVX2) && width >= 16) {
I422ToABGRRow = I422ToABGRRow_Any_AVX2;
if (IS_ALIGNED(width, 16)) {
I422ToABGRRow = I422ToABGRRow_AVX2;
}
}
#endif
for (y = 0; y < height; ++y) {
I422ToABGRRow(src_y, src_u, src_v, dst_abgr, width);

3
source/row_any.cc
View File

@ -71,6 +71,9 @@ YANY(I422ToBGRARow_Any_AVX2, I422ToBGRARow_AVX2, I422ToBGRARow_C, 1, 4, 15)
#ifdef HAS_I422TORGBAROW_AVX2
YANY(I422ToRGBARow_Any_AVX2, I422ToRGBARow_AVX2, I422ToRGBARow_C, 1, 4, 15)
#endif // HAS_I422TORGBAROW_AVX2
#ifdef HAS_I422TOABGRROW_AVX2
YANY(I422ToABGRRow_Any_AVX2, I422ToABGRRow_AVX2, I422ToABGRRow_C, 1, 4, 15)
#endif // HAS_I422TOABGRROW_AVX2
#ifdef HAS_I422TOARGBROW_NEON
YANY(I444ToARGBRow_Any_NEON, I444ToARGBRow_NEON, I444ToARGBRow_C, 0, 4, 7)
YANY(I422ToARGBRow_Any_NEON, I422ToARGBRow_NEON, I422ToARGBRow_C, 1, 4, 7)

51
source/row_win.cc
View File

@ -1613,6 +1613,7 @@ void I422ToARGBRow_AVX2(const uint8* y_buf,
// 16 pixels
// 8 UV values upsampled to 16 UV, mixed with 16 Y producing 16 BGRA (64 bytes).
// TODO(fbarchard): Use macros to reduce duplicate code. See SSSE3.
__declspec(naked) __declspec(align(16))
void I422ToBGRARow_AVX2(const uint8* y_buf,
const uint8* u_buf,
@ -1658,6 +1659,7 @@ void I422ToBGRARow_AVX2(const uint8* y_buf,
// 16 pixels
// 8 UV values upsampled to 16 UV, mixed with 16 Y producing 16 RGBA (64 bytes).
// TODO(fbarchard): Use macros to reduce duplicate code. See SSSE3.
__declspec(naked) __declspec(align(16))
void I422ToRGBARow_AVX2(const uint8* y_buf,
const uint8* u_buf,
@ -1701,6 +1703,51 @@ void I422ToRGBARow_AVX2(const uint8* y_buf,
}
}
// 16 pixels
// 8 UV values upsampled to 16 UV, mixed with 16 Y producing 16 ABGR (64 bytes).
// TODO(fbarchard): Use macros to reduce duplicate code. See SSSE3.
__declspec(naked) __declspec(align(16))
void I422ToABGRRow_AVX2(const uint8* y_buf,
const uint8* u_buf,
const uint8* v_buf,
uint8* dst_argb,
int width) {
__asm {
push esi
push edi
mov eax, [esp + 8 + 4] // Y
mov esi, [esp + 8 + 8] // U
mov edi, [esp + 8 + 12] // V
mov edx, [esp + 8 + 16] // argb
mov ecx, [esp + 8 + 20] // width
sub edi, esi
vpcmpeqb ymm5, ymm5, ymm5 // generate 0xffffffffffffffff for alpha
vpxor ymm4, ymm4, ymm4
align 4
convertloop:
READYUV422_AVX2
YUVTORGB_AVX2
// Step 3: Weave into ABGR
vpunpcklbw ymm1, ymm2, ymm1 // RG
vpermq ymm1, ymm1, 0xd8
vpunpcklbw ymm2, ymm0, ymm5 // BA
vpermq ymm2, ymm2, 0xd8
vpunpcklwd ymm0, ymm1, ymm2 // RGBA first 8 pixels
vpunpckhwd ymm1, ymm1, ymm2 // RGBA next 8 pixels
vmovdqu [edx], ymm0
vmovdqu [edx + 32], ymm1
lea edx, [edx + 64]
sub ecx, 16
jg convertloop
vzeroupper
pop edi
pop esi
ret
}
}
#endif // HAS_I422TOARGBROW_AVX2
#ifdef HAS_I422TOARGBROW_SSSE3
@ -1827,8 +1874,8 @@ void I444ToARGBRow_SSSE3(const uint8* y_buf,
punpcklbw xmm0, xmm1 // BG
punpcklbw xmm2, xmm5 // RA
movdqa xmm1, xmm0
punpcklwd xmm0, xmm2 // RGBA first 4 pixels
punpckhwd xmm1, xmm2 // RGBA next 4 pixels
punpcklwd xmm0, xmm2 // ABGR first 4 pixels
punpckhwd xmm1, xmm2 // ABGR next 4 pixels
movdqu [edx], xmm0
movdqu [edx + 16], xmm1
lea edx, [edx + 32]