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Refine function MipsCpuCaps.

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1. Refactored function MipsCpuCaps.
2. allow msa and mmi can be enabled together.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Shiyou Yin <yinshiyou-hf@loongson.cn>
Change-Id: I7330d0551a6a167e4c76d37e4defcc20783f5815
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/2131145
Reviewed-by: Hsiu Wang <hsiu@google.com>
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
Frank Barchard 2020-04-01 06:05:47 -07:00 committed by Commit Bot
parent 7e05059557
commit f813b8a810
1 changed files with 21 additions and 30 deletions
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51
source/cpu_id.cc
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@ -164,43 +164,38 @@ LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
// TODO(fbarchard): Consider read_msa_ir(). // TODO(fbarchard): Consider read_msa_ir().
// TODO(fbarchard): Add unittest. // TODO(fbarchard): Add unittest.
LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name, LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name) {
const char ase[]) {
char cpuinfo_line[512]; char cpuinfo_line[512];
int flag = 0x0;
FILE* f = fopen(cpuinfo_name, "r"); FILE* f = fopen(cpuinfo_name, "r");
if (!f) { if (!f) {
// ase enabled if /proc/cpuinfo is unavailable. // Assume nothing if /proc/cpuinfo is unavailable.
if (strcmp(ase, " msa") == 0) { // This will occur for Chrome sandbox for Pepper or Render process.
return kCpuHasMSA;
}
if (strcmp(ase, " mmi") == 0) {
return kCpuHasMMI;
}
return 0; return 0;
} }
while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
if (memcmp(cpuinfo_line, "cpu model", 9) == 0) {
// Workaround early kernel without mmi in ASEs line.
if (strstr(cpuinfo_line, "Loongson-3")) {
flag |= kCpuHasMMI;
} else if (strstr(cpuinfo_line, "Loongson-2K")) {
flag |= kCpuHasMMI | kCpuHasMSA;
}
}
if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) { if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
char* p = strstr(cpuinfo_line, ase); if (strstr(cpuinfo_line, "loongson-mmi") &&
if (p) { strstr(cpuinfo_line, "loongson-ext")) {
fclose(f); flag |= kCpuHasMMI;
if (strcmp(ase, " msa") == 0) {
return kCpuHasMSA;
} }
return 0; if (strstr(cpuinfo_line, "msa")) {
} flag |= kCpuHasMSA;
} else if (memcmp(cpuinfo_line, "cpu model", 9) == 0) {
char* p = strstr(cpuinfo_line, "Loongson-3");
if (p) {
fclose(f);
if (strcmp(ase, " mmi") == 0) {
return kCpuHasMMI;
}
return 0;
} }
// ASEs is the last line, so we can break here.
break;
} }
} }
fclose(f); fclose(f);
return 0; return flag;
} }
static SAFEBUFFERS int GetCpuFlags(void) { static SAFEBUFFERS int GetCpuFlags(void) {
@ -242,11 +237,7 @@ static SAFEBUFFERS int GetCpuFlags(void) {
} }
#endif #endif
#if defined(__mips__) && defined(__linux__) #if defined(__mips__) && defined(__linux__)
#if defined(__mips_msa) cpu_info = MipsCpuCaps("/proc/cpuinfo");
cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa");
#elif defined(_MIPS_ARCH_LOONGSON3A)
cpu_info = MipsCpuCaps("/proc/cpuinfo", " mmi");
#endif
cpu_info |= kCpuHasMIPS; cpu_info |= kCpuHasMIPS;
#endif #endif
#if defined(__arm__) || defined(__aarch64__) #if defined(__arm__) || defined(__aarch64__)