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[AArch64] Add SVE2 implementation of I210AlphaToARGBRow

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Observed reduction in runtime compared to the existing Neon code:

Cortex-A510: -33.9%
Cortex-A520:  -4.2%
Cortex-A715: -22.0%
Cortex-A720: -22.4%
  Cortex-X2: -14.6%
  Cortex-X3: -14.5%
  Cortex-X4: -11.6%
Cortex-X925: -12.6%

Bug: b/42280942
Change-Id: Ifb4ed7a865c369d584af498cc65b84d065cfb207
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6023580
Reviewed-by: Justin Green <greenjustin@google.com>
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
George Steed 2024-05-16 16:52:24 +01:00 committed by Frank Barchard
parent 50108f29fb
commit fc3569ad27
3 changed files with 76 additions and 0 deletions
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8
include/libyuv/row.h
View File

@ -553,6 +553,7 @@ extern "C" {
#define HAS_BGRATOUVROW_SVE2
#define HAS_DIVIDEROW_16_SVE2
#define HAS_HALFFLOATROW_SVE2
#define HAS_I210ALPHATOARGBROW_SVE2
#define HAS_I210TOARGBROW_SVE2
#define HAS_I212TOAR30ROW_SVE2
#define HAS_I212TOARGBROW_SVE2
@ -1066,6 +1067,13 @@ void I210AlphaToARGBRow_NEON(const uint16_t* src_y,
uint8_t* rgb_buf,
const struct YuvConstants* yuvconstants,
int width);
void I210AlphaToARGBRow_SVE2(const uint16_t* src_y,
const uint16_t* src_u,
const uint16_t* src_v,
const uint16_t* src_a,
uint8_t* rgb_buf,
const struct YuvConstants* yuvconstants,
int width);
void I410AlphaToARGBRow_NEON(const uint16_t* src_y,
const uint16_t* src_u,
const uint16_t* src_v,

10
source/convert_argb.cc
View File

@ -2735,6 +2735,11 @@ int I010AlphaToARGBMatrix(const uint16_t* src_y,
}
}
#endif
#if defined(HAS_I210ALPHATOARGBROW_SVE2)
if (TestCpuFlag(kCpuHasSVE2)) {
I210AlphaToARGBRow = I210AlphaToARGBRow_SVE2;
}
#endif
#if defined(HAS_I210ALPHATOARGBROW_SSSE3)
if (TestCpuFlag(kCpuHasSSSE3)) {
I210AlphaToARGBRow = I210AlphaToARGBRow_Any_SSSE3;
@ -2849,6 +2854,11 @@ int I210AlphaToARGBMatrix(const uint16_t* src_y,
}
}
#endif
#if defined(HAS_I210ALPHATOARGBROW_SVE2)
if (TestCpuFlag(kCpuHasSVE2)) {
I210AlphaToARGBRow = I210AlphaToARGBRow_SVE2;
}
#endif
#if defined(HAS_I210ALPHATOARGBROW_SSSE3)
if (TestCpuFlag(kCpuHasSSSE3)) {
I210AlphaToARGBRow = I210AlphaToARGBRow_Any_SSSE3;

58
source/row_sve.cc
View File

@ -227,6 +227,13 @@ extern "C" {
"uqshrnt z16.b, z17.h, #6 \n" /* BG */ \
"trn1 z17.b, z18.b, z19.b \n" /* RA */
#define RGBATOARGB8_SVE \
/* Inputs: B: z16.h, G: z17.h, R: z18.h, A: z19.h */ \
"uqshrnb z16.b, z16.h, #6 \n" /* B0 */ \
"uqshrnt z16.b, z17.h, #6 \n" /* BG */ \
"uqshrnb z17.b, z18.h, #6 \n" /* R0 */ \
"uqshrnt z17.b, z19.h, #2 \n" /* RA */
#define RGBTOARGB8_SVE_2X \
/* Inputs: B: z16.h, G: z17.h, R: z18.h, A: z19.b */ \
"uqshrnb z16.b, z16.h, #6 \n" /* B0 */ \
@ -1904,6 +1911,57 @@ void I210ToARGBRow_SVE2(const uint16_t* src_y,
: "cc", "memory", YUVTORGB_SVE_REGS);
}
void I210AlphaToARGBRow_SVE2(const uint16_t* src_y,
const uint16_t* src_u,
const uint16_t* src_v,
const uint16_t* src_a,
uint8_t* dst_argb,
const struct YuvConstants* yuvconstants,
int width) {
uint64_t vl;
asm("cnth %0" : "=r"(vl));
int width_last_y = width & (vl - 1);
width_last_y = width_last_y == 0 ? vl : width_last_y;
asm volatile(
"ptrue p0.b \n" YUVTORGB_SVE_SETUP
"subs %w[width], %w[width], %w[vl] \n"
"b.lt 2f \n"
// Run bulk of computation with an all-true predicate to avoid predicate
// generation overhead.
"ptrue p1.h \n"
"1: \n" READI210_SVE
"ld1h {z19.h}, p1/z, [%[src_a]] \n" I4XXTORGB_SVE
"incb %[src_a] \n" RGBATOARGB8_SVE
"subs %w[width], %w[width], %w[vl] \n"
"st2h {z16.h, z17.h}, p1, [%[dst_argb]] \n"
"add %[dst_argb], %[dst_argb], %[vl], lsl #2 \n"
"b.ge 1b \n"
"2: \n"
"adds %w[width], %w[width], %w[vl] \n"
"b.eq 99f \n"
// Calculate a predicate for the final iteration to deal with the tail.
"whilelt p1.h, wzr, %w[width_last_y] \n" READI210_SVE
"ld1h {z19.h}, p1/z, [%[src_a]] \n" //
I4XXTORGB_SVE RGBATOARGB8_SVE
"st2h {z16.h, z17.h}, p1, [%[dst_argb]] \n"
"99: \n"
: [src_y] "+r"(src_y), // %[src_y]
[src_u] "+r"(src_u), // %[src_u]
[src_v] "+r"(src_v), // %[src_v]
[src_a] "+r"(src_a), // %[src_a]
[dst_argb] "+r"(dst_argb), // %[dst_argb]
[width] "+r"(width) // %[width]
: [vl] "r"(vl), // %[vl]
[kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
[width_last_y] "r"(width_last_y) // %[width_last_y]
: "cc", "memory", YUVTORGB_SVE_REGS);
}
// P210 has 10 bits in msb of 16 bit NV12 style layout.
void P210ToARGBRow_SVE2(const uint16_t* src_y,
const uint16_t* src_uv,