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https://chromium.googlesource.com/libyuv/libyuv
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274608ef0f
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8a99aea12b
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"writtenOn": "2024-12-12T11:11:42Z",
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"side": 1,
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"message": "All caught up on reviews. I\u0027m on holidays for 2 weeks. If theres an important change, as Justin to review and land it",
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"writtenOn": "2024-12-12T11:11:42Z",
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"side": 1,
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"message": "could regular sve do the same performance for inner loop as neon, but support predicate for remainder to get a small win?",
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"writtenOn": "2024-12-12T11:11:42Z",
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"side": 1,
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"message": "consider 2 vectors",
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"fixSuggestions": [
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},
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"replacement": "__arm_locally_streaming void CopyRow_16_SME(const uint16_t* src,\n uint16_t* dst,\n int width) {\n"
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"replacement": " asm volatile(\n \"cnth %x[vl] \\n\"\n \"subs %w[width], %w[width], %w[vl] \\n\"\n \"b.lt 2f \\n\"\n\n // Run bulk of computation with an all-true predicate to avoid predicate\n // generation overhead.\n \"ptrue p0.h \\n\"\n \"1: \\n\"\n \"ld1h {z0.h}, p0/z, [%[src]] \\n\"\n \"incb %[src] \\n\"\n \"subs %w[width], %w[width], %w[vl] \\n\"\n \"st1h {z0.h}, p0, [%[dst]] \\n\"\n \"incb %[dst] \\n\"\n \"b.ge 1b \\n\"\n\n \"2: \\n\"\n \"adds %w[width], %w[width], %w[vl] \\n\"\n \"b.eq 99f \\n\"\n\n // Calculate a predicate for the final iteration to deal with the tail.\n \"whilelt p0.h, wzr, %w[width] \\n\"\n \"ld1h {z0.h}, p0/z, [%[src]] \\n\"\n \"st1h {z0.h}, p0, [%[dst]] \\n\"\n\n \"99: \\n\"\n : [src] \"+r\"(src), // %[src]\n [dst] \"+r\"(dst), // %[dst]\n [width] \"+r\"(width),// %[width]\n [vl] \"\u003d\u0026r\"(vl) // %[vl]\n :\n : \"memory\", \"cc\", \"z0\", \"p0\");\n}\n\n__arm_locally_streaming void CopyRow_8_SME(const uint8_t* src,\n uint8_t* dst,\n int width) {\n // Streaming-SVE only, no use of ZA tile.\n int vl;\n"
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"replacement": " : [src] \"+r\"(src), // %[src]\n [dst] \"+r\"(dst), // %[dst]\n [width] \"+r\"(width),// %[width]\n [vl] \"\u003d\u0026r\"(vl) // %[vl]\n"
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@ -1,39 +0,0 @@
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"writtenOn": "2024-12-12T07:45:57Z",
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"side": 1,
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"message": "ideally run sme benchmarks on apple m4 or equivalent.\nconsider doing LDP with int64 to achieve 128 bit load/store",
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"writtenOn": "2024-12-12T10:58:31Z",
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"side": 1,
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"message": "SVE and the first version of SME do not have an LDP equivalent instruction. SVE 2.1 and SME 2 introduce multi-vector load/store instructions which are equivalent to LDP/STP however these would need additional compiler features to be enabled (-march\u003d...+sme2 rather than -march\u003d...+sme which we currently use).\n\nOf course if you can guarantee that the vector length is 128 bits then you can use the Neon LDP/STP instructions since they share the same vector length, but this is not portable so I would prefer to avoid hard-coding this anywhere.",
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