Update patch set 4

Patch Set 4:

(3 comments)

Patch-set: 4
Attention: {"person_ident":"Gerrit User 1571352 \u003c1571352@3ce6091f-6c88-37e8-8c75-72f92ae8dfba\u003e","operation":"ADD","reason":"\u003cGERRIT_ACCOUNT_1115898\u003e replied on the change"}

2d8652f3e7ba0427c2e72b086a787b96169e1466

@@ -0,0 +1,111 @@
+{
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+      "author": {
+        "id": 1115898
+      },
+      "writtenOn": "2024-12-12T11:11:42Z",
+      "side": 1,
+      "message": "All caught up on reviews.  I\u0027m on holidays for 2 weeks.  If theres an important change, as Justin to review and land it",
+      "revId": "2d8652f3e7ba0427c2e72b086a787b96169e1466",
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+        "filename": "source/row_sme.cc",
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+      "author": {
+        "id": 1115898
+      },
+      "writtenOn": "2024-12-12T11:11:42Z",
+      "side": 1,
+      "message": "could regular sve do the same performance for inner loop as neon, but support predicate for remainder to get a small win?",
+      "fixSuggestions": [
+        {
+          "fixId": "2da94437_81e45043",
+          "description": "prompt_to_edit API",
+          "replacements": [
+            {
+              "path": "source/row_sme.cc",
+              "range": {
+                "startLine": 473,
+                "startChar": 0,
+                "endLine": 512,
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+              "replacement": ""
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+      "author": {
+        "id": 1115898
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+      "writtenOn": "2024-12-12T11:11:42Z",
+      "side": 1,
+      "message": "consider 2 vectors",
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+        {
+          "fixId": "99524abd_16ff1ed8",
+          "description": "prompt_to_edit API",
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+              "replacement": "__arm_locally_streaming void CopyRow_16_SME(const uint16_t* src,\n                                             uint16_t* dst,\n                                             int width) {\n"
+            },
+            {
+              "path": "source/row_sme.cc",
+              "range": {
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+                "startChar": 0,
+                "endLine": 479,
+                "endChar": 0
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+              "replacement": "  asm volatile(\n      \"cnth    %x[vl]                                   \\n\"\n      \"subs    %w[width], %w[width], %w[vl]             \\n\"\n      \"b.lt    2f                                       \\n\"\n\n      // Run bulk of computation with an all-true predicate to avoid predicate\n      // generation overhead.\n      \"ptrue   p0.h                                     \\n\"\n      \"1:                                               \\n\"\n      \"ld1h    {z0.h}, p0/z, [%[src]]                 \\n\"\n      \"incb    %[src]                                 \\n\"\n      \"subs    %w[width], %w[width], %w[vl]             \\n\"\n      \"st1h    {z0.h}, p0, [%[dst]]                   \\n\"\n      \"incb    %[dst]                                 \\n\"\n      \"b.ge    1b                                       \\n\"\n\n      \"2:                                               \\n\"\n      \"adds    %w[width], %w[width], %w[vl]             \\n\"\n      \"b.eq    99f                                      \\n\"\n\n      // Calculate a predicate for the final iteration to deal with the tail.\n      \"whilelt p0.h, wzr, %w[width]                     \\n\"\n      \"ld1h    {z0.h}, p0/z, [%[src]]                 \\n\"\n      \"st1h    {z0.h}, p0, [%[dst]]                   \\n\"\n\n      \"99:                                              \\n\"\n      : [src] \"+r\"(src),    // %[src]\n        [dst] \"+r\"(dst),    // %[dst]\n        [width] \"+r\"(width),// %[width]\n        [vl] \"\u003d\u0026r\"(vl)      // %[vl]\n      :\n      : \"memory\", \"cc\", \"z0\", \"p0\");\n}\n\n__arm_locally_streaming void CopyRow_8_SME(const uint8_t* src,\n                                           uint8_t* dst,\n                                           int width) {\n  // Streaming-SVE only, no use of ZA tile.\n  int vl;\n"
+            },
+            {
+              "path": "source/row_sme.cc",
+              "range": {
+                "startLine": 505,
+                "startChar": 0,
+                "endLine": 509,
+                "endChar": 0
+              },
+              "replacement": "      : [src] \"+r\"(src),    // %[src]\n        [dst] \"+r\"(dst),    // %[dst]\n        [width] \"+r\"(width),// %[width]\n        [vl] \"\u003d\u0026r\"(vl)      // %[vl]\n"
+            }
+          ]
+        }
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+}

d5818026ec4bd861a5a8aba6d428c576ba2ba5f5

@@ -0,0 +1,39 @@
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+      "author": {
+        "id": 1115898
+      },
+      "writtenOn": "2024-12-12T07:45:57Z",
+      "side": 1,
+      "message": "ideally run sme benchmarks on apple m4 or equivalent.\nconsider doing LDP with int64 to achieve 128 bit load/store",
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+      "author": {
+        "id": 1571352
+      },
+      "writtenOn": "2024-12-12T10:58:31Z",
+      "side": 1,
+      "message": "SVE and the first version of SME do not have an LDP equivalent instruction. SVE 2.1 and SME 2 introduce multi-vector load/store instructions which are equivalent to LDP/STP however these would need additional compiler features to be enabled (-march\u003d...+sme2 rather than -march\u003d...+sme which we currently use).\n\nOf course if you can guarantee that the vector length is 128 bits then you can use the Neon LDP/STP instructions since they share the same vector length, but this is not portable so I would prefer to avoid hard-coding this anywhere.",
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f855222902c6570dfb3dd0ec23c65dc55bc326c8

@@ -0,0 +1,155 @@
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