| .. |
|
compare_common.cc
|
compare_common visual c port
|
2014-01-09 19:11:09 +00:00 |
|
compare_neon64.cc
|
change vector range notation to a list of registers for clang compatibility. break compare into 2 neon files for consistency with other neon64 files.
|
2014-09-15 23:39:43 +00:00 |
|
compare_neon.cc
|
change vector range notation to a list of registers for clang compatibility. break compare into 2 neon files for consistency with other neon64 files.
|
2014-09-15 23:39:43 +00:00 |
|
compare_posix.cc
|
Remove alignment constraint for SSE2. Allows the optimized function to be used with unaligned memory, improving performance in that use case. Hurts performance on core2 and prior where memory was faster with movdqa instruction.
|
2014-09-30 18:53:34 +00:00 |
|
compare_win.cc
|
Remove alignment constraint for SSE2. Allows the optimized function to be used with unaligned memory, improving performance in that use case. Hurts performance on core2 and prior where memory was faster with movdqa instruction.
|
2014-09-30 18:53:34 +00:00 |
|
compare.cc
|
Remove alignment constraint for SSE2. Allows the optimized function to be used with unaligned memory, improving performance in that use case. Hurts performance on core2 and prior where memory was faster with movdqa instruction.
|
2014-09-30 18:53:34 +00:00 |
|
convert_argb.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
convert_from_argb.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
convert_from.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
convert_jpeg.cc
|
libyuv::MJPGToI420() and libyuv::MJPGToARGB() return failure if callback to JPeg fails.
|
2014-01-28 03:08:59 +00:00 |
|
convert_to_argb.cc
|
Conversion functions ported to C89 / Visual C.
|
2014-01-13 18:32:37 +00:00 |
|
convert_to_i420.cc
|
Conversion functions ported to C89 / Visual C.
|
2014-01-13 18:32:37 +00:00 |
|
convert.cc
|
pavgb with memory op requires alignment. This CL disables conversions that use pavgb, and resolves scale by 3/8 unittest for checking alignment works. The 3/8 code used a pavgb with a memory operand. tests are added for scaling and allow unaligning on purpose.
|
2014-10-07 01:57:34 +00:00 |
|
cpu_id.cc
|
Detect asimd as same as Neon for Arm features. Used on Juno aarch64 linux.
|
2014-09-22 18:30:17 +00:00 |
|
format_conversion.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
mjpeg_decoder.cc
|
fix a lint warning about a space needed after && in ifdef
|
2014-08-18 23:22:20 +00:00 |
|
mjpeg_validate.cc
|
Port a few functions to C
|
2014-01-06 22:37:28 +00:00 |
|
planar_functions.cc
|
Make row functions used for planarfunctions and convert use movdqu to relax alignment constraint. Step 1 - make functions unaligned.
|
2014-10-03 21:11:37 +00:00 |
|
rotate_argb.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
rotate_mips.cc
|
only enable mips assembly for old 32 bit abi. new 32 bit abi and 64 bit bit able remove t4 to t7 and add a4 to a7
|
2014-06-24 23:40:52 +00:00 |
|
rotate_neon64.cc
|
Remove __ARM_NEON__ define check for AArch64
|
2014-09-29 09:40:37 +00:00 |
|
rotate_neon.cc
|
Change ifdefs for arm 32 and 64 bit so there will only be 32 bit in legacy mode.
|
2014-09-15 22:05:01 +00:00 |
|
rotate.cc
|
Make rotate SIMD allow unaligned pointers.
|
2014-10-02 17:56:48 +00:00 |
|
row_any.cc
|
pavgb with memory op requires alignment. This CL disables conversions that use pavgb, and resolves scale by 3/8 unittest for checking alignment works. The 3/8 code used a pavgb with a memory operand. tests are added for scaling and allow unaligning on purpose.
|
2014-10-07 01:57:34 +00:00 |
|
row_common.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
row_mips.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
row_neon64.cc
|
Row AArch64 Neon implementation - Part 8
|
2014-10-03 18:10:05 +00:00 |
|
row_neon.cc
|
InterpolateRow used for scale handle unaligned memory. Remove HalfRow which is not used.
|
2014-10-03 17:37:11 +00:00 |
|
row_posix.cc
|
pavgb with memory op requires alignment. This CL disables conversions that use pavgb, and resolves scale by 3/8 unittest for checking alignment works. The 3/8 code used a pavgb with a memory operand. tests are added for scaling and allow unaligning on purpose.
|
2014-10-07 01:57:34 +00:00 |
|
row_win.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
row_x86.asm
|
yasm ALIGN uppercase
|
2013-12-03 00:51:14 +00:00 |
|
scale_argb.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
scale_common.cc
|
Change scale to unaligned movdqu.
|
2014-10-01 01:16:04 +00:00 |
|
scale_mips.cc
|
only enable mips assembly for old 32 bit abi. new 32 bit abi and 64 bit bit able remove t4 to t7 and add a4 to a7
|
2014-06-24 23:40:52 +00:00 |
|
scale_neon64.cc
|
add stride to pointer in C and pass as register to inline.
|
2014-09-19 22:51:39 +00:00 |
|
scale_neon.cc
|
Change ifdefs for arm 32 and 64 bit so there will only be 32 bit in legacy mode.
|
2014-09-15 22:05:01 +00:00 |
|
scale_posix.cc
|
pavgb with memory op requires alignment. This CL disables conversions that use pavgb, and resolves scale by 3/8 unittest for checking alignment works. The 3/8 code used a pavgb with a memory operand. tests are added for scaling and allow unaligning on purpose.
|
2014-10-07 01:57:34 +00:00 |
|
scale_win.cc
|
pavgb with memory op requires alignment. This CL disables conversions that use pavgb, and resolves scale by 3/8 unittest for checking alignment works. The 3/8 code used a pavgb with a memory operand. tests are added for scaling and allow unaligning on purpose.
|
2014-10-07 01:57:34 +00:00 |
|
scale.cc
|
Remove unaligned functions, since most function support unaligned memory now. This reduces complexity and improves performance for unaligned cases because C code can be avoided, and overhead is less. Downside is old cpus (core2 and earlier) will be slower for aligned memory case. Except mips, which has alignment requirement, but remove unaligned variant.
|
2014-10-07 00:59:31 +00:00 |
|
video_common.cc
|
Port a few functions to C
|
2014-01-06 22:37:28 +00:00 |
|
x86inc.asm
|
Do not allows the other elfs to run on the chimney stack
|
2012-12-13 18:44:41 +00:00 |
008ce53ac4