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https://chromium.googlesource.com/libyuv/libyuv
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d26b451472
BUG=135 TEST=/libyuv_unittest --gtest_filter=*NV* Review URL: https://webrtc-codereview.appspot.com/939005 git-svn-id: http://libyuv.googlecode.com/svn/trunk@444 16f28f9a-4ce2-e073-06de-1de4eb20be90
175 lines
8.3 KiB
C++
175 lines
8.3 KiB
C++
/*
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* Copyright (c) 2012 The LibYuv project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "libyuv/row.h"
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#ifdef __cplusplus
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namespace libyuv {
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extern "C" {
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#endif
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#if !defined(YUV_DISABLE_ASM) && defined(__mips__)
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#ifdef HAS_SPLITUV_MIPS_DSPR2
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void SplitUV_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
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int width) {
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__asm__ __volatile__ (
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".set push \n"
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".set noreorder \n"
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"srl $t4, %[width], 4 \n" // multiplies of 16
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"blez $t4, 2f \n"
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" andi %[width], %[width], 0xf \n" // residual
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"1: \n"
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"addiu $t4, $t4, -1 \n"
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"lw $t0, 0(%[src_uv]) \n" // V1 | U1 | V0 | U0
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"lw $t1, 4(%[src_uv]) \n" // V3 | U3 | V2 | U2
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"lw $t2, 8(%[src_uv]) \n" // V5 | U5 | V4 | U4
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"lw $t3, 12(%[src_uv]) \n" // V7 | U7 | V6 | U6
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"lw $t5, 16(%[src_uv]) \n" // V9 | U9 | V8 | U8
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"lw $t6, 20(%[src_uv]) \n" // V11 | U11 | V10 | U10
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"lw $t7, 24(%[src_uv]) \n" // V13 | U13 | V12 | U12
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"lw $t8, 28(%[src_uv]) \n" // V15 | U15 | V14 | U14
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"addiu %[src_uv], %[src_uv], 32 \n"
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"precrq.qb.ph $t9, $t1, $t0 \n" // V3 | V2 | V1 | V0
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"precr.qb.ph $t0, $t1, $t0 \n" // U3 | U2 | U1 | U0
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"precrq.qb.ph $t1, $t3, $t2 \n" // V7 | V6 | V5 | V4
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"precr.qb.ph $t2, $t3, $t2 \n" // U7 | U6 | U5 | U4
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"precrq.qb.ph $t3, $t6, $t5 \n" // V11 | V10 | V9 | V8
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"precr.qb.ph $t5, $t6, $t5 \n" // U11 | U10 | U9 | U8
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"precrq.qb.ph $t6, $t8, $t7 \n" // V15 | V14 | V13 | V12
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"precr.qb.ph $t7, $t8, $t7 \n" // U15 | U14 | U13 | U12
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"sw $t9, 0(%[dst_v]) \n"
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"sw $t0, 0(%[dst_u]) \n"
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"sw $t1, 4(%[dst_v]) \n"
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"sw $t2, 4(%[dst_u]) \n"
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"sw $t3, 8(%[dst_v]) \n"
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"sw $t5, 8(%[dst_u]) \n"
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"sw $t6, 12(%[dst_v]) \n"
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"sw $t7, 12(%[dst_u]) \n"
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"addiu %[dst_v], %[dst_v], 16 \n"
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"bgtz $t4, 1b \n"
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" addiu %[dst_u], %[dst_u], 16 \n"
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"beqz %[width], 3f \n"
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" nop \n"
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"2: \n"
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"lbu $t0, 0(%[src_uv]) \n"
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"lbu $t1, 1(%[src_uv]) \n"
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"addiu %[src_uv], %[src_uv], 2 \n"
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"addiu %[width], %[width], -1 \n"
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"sb $t0, 0(%[dst_u]) \n"
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"sb $t1, 0(%[dst_v]) \n"
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"addiu %[dst_u], %[dst_u], 1 \n"
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"bgtz %[width], 2b \n"
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" addiu %[dst_v], %[dst_v], 1 \n"
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"3: \n"
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".set pop \n"
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: [src_uv] "+r" (src_uv),
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[width] "+r" (width),
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[dst_u] "+r" (dst_u),
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[dst_v] "+r" (dst_v)
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:
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: "t0", "t1", "t2", "t3",
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"t4", "t5", "t6", "t7", "t8", "t9"
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);
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}
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void SplitUV_Unaligned_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u,
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uint8* dst_v, int width) {
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__asm__ __volatile__ (
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".set push \n"
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".set noreorder \n"
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"srl $t4, %[width], 4 \n" // multiplies of 16
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"blez $t4, 2f \n"
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" andi %[width], %[width], 0xf \n" // residual
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"1: \n"
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"addiu $t4, $t4, -1 \n"
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"lwr $t0, 0(%[src_uv]) \n"
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"lwl $t0, 3(%[src_uv]) \n" // V1 | U1 | V0 | U0
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"lwr $t1, 4(%[src_uv]) \n"
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"lwl $t1, 7(%[src_uv]) \n" // V3 | U3 | V2 | U2
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"lwr $t2, 8(%[src_uv]) \n"
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"lwl $t2, 11(%[src_uv]) \n" // V5 | U5 | V4 | U4
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"lwr $t3, 12(%[src_uv]) \n"
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"lwl $t3, 15(%[src_uv]) \n" // V7 | U7 | V6 | U6
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"lwr $t5, 16(%[src_uv]) \n"
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"lwl $t5, 19(%[src_uv]) \n" // V9 | U9 | V8 | U8
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"lwr $t6, 20(%[src_uv]) \n"
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"lwl $t6, 23(%[src_uv]) \n" // V11 | U11 | V10 | U10
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"lwr $t7, 24(%[src_uv]) \n"
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"lwl $t7, 27(%[src_uv]) \n" // V13 | U13 | V12 | U12
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"lwr $t8, 28(%[src_uv]) \n"
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"lwl $t8, 31(%[src_uv]) \n" // V15 | U15 | V14 | U14
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"precrq.qb.ph $t9, $t1, $t0 \n" // V3 | V2 | V1 | V0
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"precr.qb.ph $t0, $t1, $t0 \n" // U3 | U2 | U1 | U0
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"precrq.qb.ph $t1, $t3, $t2 \n" // V7 | V6 | V5 | V4
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"precr.qb.ph $t2, $t3, $t2 \n" // U7 | U6 | U5 | U4
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"precrq.qb.ph $t3, $t6, $t5 \n" // V11 | V10 | V9 | V8
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"precr.qb.ph $t5, $t6, $t5 \n" // U11 | U10 | U9 | U8
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"precrq.qb.ph $t6, $t8, $t7 \n" // V15 | V14 | V13 | V12
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"precr.qb.ph $t7, $t8, $t7 \n" // U15 | U14 | U13 | U12
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"addiu %[src_uv], %[src_uv], 32 \n"
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"swr $t9, 0(%[dst_v]) \n"
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"swl $t9, 3(%[dst_v]) \n"
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"swr $t0, 0(%[dst_u]) \n"
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"swl $t0, 3(%[dst_u]) \n"
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"swr $t1, 4(%[dst_v]) \n"
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"swl $t1, 7(%[dst_v]) \n"
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"swr $t2, 4(%[dst_u]) \n"
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"swl $t2, 7(%[dst_u]) \n"
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"swr $t3, 8(%[dst_v]) \n"
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"swl $t3, 11(%[dst_v]) \n"
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"swr $t5, 8(%[dst_u]) \n"
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"swl $t5, 11(%[dst_u]) \n"
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"swr $t6, 12(%[dst_v]) \n"
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"swl $t6, 15(%[dst_v]) \n"
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"swr $t7, 12(%[dst_u]) \n"
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"swl $t7, 15(%[dst_u]) \n"
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"addiu %[dst_u], %[dst_u], 16 \n"
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"bgtz $t4, 1b \n"
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" addiu %[dst_v], %[dst_v], 16 \n"
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"beqz %[width], 3f \n"
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" nop \n"
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"2: \n"
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"lbu $t0, 0(%[src_uv]) \n"
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"lbu $t1, 1(%[src_uv]) \n"
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"addiu %[src_uv], %[src_uv], 2 \n"
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"addiu %[width], %[width], -1 \n"
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"sb $t0, 0(%[dst_u]) \n"
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"sb $t1, 0(%[dst_v]) \n"
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"addiu %[dst_u], %[dst_u], 1 \n"
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"bgtz %[width], 2b \n"
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" addiu %[dst_v], %[dst_v], 1 \n"
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"3: \n"
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".set pop \n"
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: [src_uv] "+r" (src_uv),
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[width] "+r" (width),
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[dst_u] "+r" (dst_u),
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[dst_v] "+r" (dst_v)
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:
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: "t0", "t1", "t2", "t3",
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"t4", "t5", "t6", "t7", "t8", "t9"
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);
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}
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#endif // HAS_SPLITUV_MIPS_DSPR2
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#endif // __mips__
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#ifdef __cplusplus
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} // extern "C"
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} // namespace libyuv
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#endif
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