Frank Barchard 205022c08c [libyuv] Add AVX-512 VNNI row functions for ARGB to YUV and Gray
Add AVX-512 VNNI (VPDPBUSD / _mm512_dpbusd_epi32) row kernels for 64-bit
x86 targets alongside existing AVX-512BW implementations in both
row_gcc.cc (inline assembly) and row_win.cc (C++ intrinsics):

- ARGBToYMatrixRow_AVX512VNNI and ARGBToYMatrixRow_Any_AVX512VNNI:
  Pre-computes the 32-bit signed-pixel bias once per row and replaces
  vpmaddubsw + vpmaddwd + vpaddw with a single vpdpbusd per 16 pixels.
- ARGBToUV444MatrixRow_AVX512VNNI and
  ARGBToUV444MatrixRow_Any_AVX512VNNI: Loads 64 ARGB pixels once instead
  of twice and computes 32-bit U and V dot products directly via
  vpdpbusd with signed UV matrix coefficients.
- ARGBToUVMatrixRow_AVX512VNNI: Computes 2x2 box-filtered ARGB to U and
  V conversion using vpdpbusd with k-masked tail handling for arbitrary
  widths.
- ARGBGrayRow_AVX512VNNI: Computes BT.601 grayscale luminance using a
  single vpdpbusd per 16 pixels, broadcasts Y to RGB via vpshufb, and
  preserves alpha via vpternlogd with k-masked tail handling.
- Wire runtime dispatch via TestCpuFlag(kCpuHasAVX512VNNI) across
  convert.cc, convert_from_argb.cc, and planar_functions.cc.

Add AVX512VNNIVBMI variants of the Y, UV444 and UV kernels. These use
both AVX-512 VNNI (vpdpbusd) and AVX-512 VBMI (vpermt2b) and are only
selected when the CPU has both features; there are no VBMI versions
without VNNI. The AVX512VNNI kernels remain for CPUs with VNNI but no
VBMI (Cascade Lake, Cooper Lake).

- The 32-bit sums are always in [0, 65535], so Y, U and V are byte 1 of
  each int32. Two vpermt2b gather 64 results from 4 accumulators,
  replacing vpackusdw/vpackssdw + vpsrlw + vpackuswb + vpermd.
- U and V accumulators start at ~kAddUV so they hold ~(kAddUV - dot).
  The inverse is folded into the vpternlogd that merges the two
  256-bit halves. kAddUV is loaded from ArgbConstants rather than
  hard coded as 0x8000.
- Y folds the source loads into vpxorq.
- row_win.cc hides the vpermt2b indices from clang, which otherwise
  constant folds them into a longer vpshufb + vpor + vpermd sequence.

Performance (1280x720, 5000 iterations, AVX512BW -> AVX512VNNI):
uArch / Benchmark            AVX512BW  AVX512VNNI  Speedup
---------------------------  --------  ----------  -------
Intel Ice Lake ARGBToI420      941 ms      862 ms   +9.2%
Intel Ice Lake ARGBToI422     1059 ms      947 ms  +11.8%
Intel Ice Lake ARGBToI444     1140 ms     1038 ms   +9.8%
Intel Ice Lake ARGBGray        357 ms      273 ms  +30.8%
Intel Sapphire Rapids GrayTo   317 ms      218 ms  +45.4%
Intel Emerald Rapids GrayTo    310 ms      213 ms  +45.5%
Intel Granite Rapids GrayTo    349 ms      241 ms  +44.8%
AMD Zen 4 ARGBToI420           648 ms      517 ms  +25.3%
AMD Zen 4 ARGBToI444           695 ms      526 ms  +32.1%
AMD Zen 4 ARGBGray             403 ms      227 ms  +77.5%
AMD Zen 5 ARGBToI422           460 ms      403 ms  +14.1%
AMD Zen 5 ARGBToI444           382 ms      321 ms  +19.0%

Performance (row_gcc, AVX512VNNI -> AVX512VNNIVBMI):
uArch / Benchmark             AVX512VNNI  VNNIVBMI  Speedup
----------------------------  ----------  --------  -------
AMD Zen 6 ARGBToI420 1280x720     327 ms    284 ms   +15.1%
AMD Zen 6 ARGBToI422 1280x720     372 ms    330 ms   +12.7%
AMD Zen 6 ARGBToI444 1280x720     357 ms    334 ms    +6.9%
AMD Zen 6 ARGBToI400 256x24        94 ms     76 ms   +23.7%
AMD Zen 5 ARGBToI422 1280x720     406 ms    350 ms   +16.0%
AMD Zen 5 ARGBToI444 1280x720     330 ms    301 ms    +9.6%
AMD Zen 5 ARGBToI400 256x24       100 ms     90 ms   +11.1%
AMD Zen 4 ARGBToI420 1280x720     631 ms    540 ms   +16.9%
AMD Zen 4 ARGBToI422 1280x720     993 ms    825 ms   +20.4%
AMD Zen 4 ARGBToI400 256x24       245 ms    218 ms   +12.4%
Intel GNR ARGBToI422 256x24       654 ms    616 ms    +6.2%
Intel SPR ARGBToI422 256x24       653 ms    613 ms    +6.5%
Intel GNR, EMR, SPR and Ice Lake are within +/-3% at 1280x720.

R=rrwinterton@gmail.com

Bug: none
Test: out/Release/libyuv_unittest --gtest_filter=*ARGBToI4*:*ARGBGray*
Test: LIBYUV_DISABLE_AVX512VBMI=1 out/Release/libyuv_unittest
Test: sde64 -gnr / -clx with is_msan=true (row_win.cc)
Change-Id: Ia7a37b39dd2948fe4055a8a7694dd1ff8ac3e55c
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8647811
Reviewed-by: richard winterton <rrwinterton@gmail.com>
2026-10-26 14:07:50 -07:00
build_overrides [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
docs [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
include [libyuv] Add AVX-512 VNNI row functions for ARGB to YUV and Gray 2026-10-26 14:07:50 -07:00
infra/config Use default xcode version in libyuv 2025-11-24 07:54:14 -08:00
riscv_script [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
source [libyuv] Add AVX-512 VNNI row functions for ARGB to YUV and Gray 2026-10-26 14:07:50 -07:00
tools_libyuv Remove libyuv dependency on base/ 2025-01-08 09:04:21 -08:00
unit_test [libyuv] Add ARGBOr and ARGBAlphaBlend with multi-platform SIMD 2026-10-26 11:24:16 -07:00
util [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
.clang-format clang-format libyuv 2016-11-07 17:37:23 -08:00
.gitignore DetilePlane and unittest for NEON 2022-01-31 20:05:55 +00:00
.gn [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
Android.bp [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
Android.mk [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
AUTHORS Fix same-width vertical point upsampling 2026-08-24 19:28:50 -07:00
BUILD.bazel [libyuv] Add WASM SIMD128 and Relaxed SIMD for RAWToRGB24Row 2026-10-05 17:45:41 -07:00
BUILD.gn [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
CM_linux_packages.cmake Use grep extended regex for version 2024-11-13 02:11:17 +00:00
CMakeLists.txt [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
codereview.settings [infra] remove no longer supported git cl upload setting. 2021-04-28 12:47:52 +00:00
DEPS [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
DIR_METADATA Move metadata in OWNERS files to DIR_METADATA files 2021-02-09 19:34:43 +00:00
download_vs_toolchain.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
GEMINI.md [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
libyuv.bzl [libyuv] Simplify RVV configuration in BUILD.bazel and libyuv.bzl 2026-09-08 17:50:17 -07:00
libyuv.gni [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
libyuv.gyp Stop setting --dynamic-linker for target_os="android" 2026-05-27 04:34:07 -07:00
libyuv.gypi [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
LICENSE Update Copyright notice to follow new chromium conventions. 2012-08-08 19:04:24 +00:00
linux.mk [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
OWNERS Remove magjed from OWNERS 2026-08-24 10:43:21 -07:00
PATENTS LibYuv: Adding PATENT and LICENSE files 2011-10-25 16:15:49 +00:00
PRESUBMIT.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
public.mk use unix line endings 2018-06-20 23:19:59 +00:00
pylintrc Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
README.chromium [libyuv] Add AVX-512 VNNI row functions for ARGB to YUV and Gray 2026-10-26 14:07:50 -07:00
README.md Update README.md and environment_variables.md for Arm 2024-09-20 00:29:33 +00:00
vpython.toml [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
vpython.toml.uv.lock [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
winarm.mk NV12 Copy, include scale_uv.h 2020-12-08 18:54:16 +00:00
WORKSPACE.bazel Add Bazel build support 2026-04-15 18:20:26 -07:00

libyuv is an open source project that includes YUV scaling and conversion functionality.

  • Scale YUV to prepare content for compression, with point, bilinear or box filter.
  • Convert to YUV from webcam formats for compression.
  • Convert to RGB formats for rendering/effects.
  • Rotate by 90/180/270 degrees to adjust for mobile devices in portrait mode.
  • Optimized for SSSE3/AVX2 on x86/x64.
  • Optimized for Neon/SVE2/SME on Arm.
  • Optimized for MSA on Mips.
  • Optimized for RVV on RISC-V.

Development

See Getting started for instructions on how to get started developing.

You can also browse the docs directory for more documentation.