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https://chromium.googlesource.com/libyuv/libyuv
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BUG=265 TEST=cpuid and Polynomial unittest R=changjun.yang@intel.com Review URL: https://webrtc-codereview.appspot.com/2217004 git-svn-id: http://libyuv.googlecode.com/svn/trunk@790 16f28f9a-4ce2-e073-06de-1de4eb20be90
267 lines
7.7 KiB
C++
267 lines
7.7 KiB
C++
/*
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* Copyright 2011 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "libyuv/cpu_id.h"
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#ifdef _MSC_VER
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#include <intrin.h> // For __cpuid()
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#endif
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#if !defined(__CLR_VER) && !defined(__native_client__) && defined(_M_X64) && \
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defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219)
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#include <immintrin.h> // For _xgetbv()
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#endif
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#if !defined(__native_client__)
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#include <stdlib.h> // For getenv()
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#endif
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// For ArmCpuCaps() but unittested on all platforms
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#include <stdio.h>
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#include <string.h>
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#include "libyuv/basic_types.h" // For CPU_X86
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// TODO(fbarchard): Consider cpu functionality for breakpoints, timer and cache.
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// arm - bkpt vs intel int 3
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// TODO(fbarchard): Use cpuid.h when gcc 4.4 is used on OSX and Linux.
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#if (defined(__pic__) || defined(__APPLE__)) && defined(__i386__)
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static __inline void __cpuid(int cpu_info[4], int info_type) {
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asm volatile ( // NOLINT
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"mov %%ebx, %%edi \n"
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"cpuid \n"
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"xchg %%edi, %%ebx \n"
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: "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type));
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}
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#elif defined(__i386__) || defined(__x86_64__)
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static __inline void __cpuid(int cpu_info[4], int info_type) {
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asm volatile ( // NOLINT
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"cpuid \n"
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: "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type));
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}
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#endif
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#ifdef __cplusplus
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namespace libyuv {
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extern "C" {
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#endif
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// Low level cpuid for X86. Returns zeros on other CPUs.
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#if !defined(__CLR_VER) && (defined(_M_IX86) || defined(_M_X64) || \
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defined(__i386__) || defined(__x86_64__))
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LIBYUV_API
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void CpuId(int cpu_info[4], int info_type) {
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__cpuid(cpu_info, info_type);
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}
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#else
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LIBYUV_API
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void CpuId(int cpu_info[4], int) {
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cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
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}
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#endif
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// X86 CPUs have xgetbv to detect OS saves high parts of ymm registers.
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#if !defined(__CLR_VER) && !defined(__native_client__)
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#if defined(_M_X64) && defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219)
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#define HAS_XGETBV
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static uint32 XGetBV(unsigned int xcr) {
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return static_cast<uint32>(_xgetbv(xcr));
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}
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#elif !defined(__CLR_VER) && defined(_M_IX86) && defined(_MSC_VER)
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#define HAS_XGETBV
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__declspec(naked) __declspec(align(16))
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static uint32 XGetBV(unsigned int xcr) {
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__asm {
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mov ecx, [esp + 4] // xcr
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push edx
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_asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0 // xgetbv for vs2005.
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pop edx
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ret
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}
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}
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#elif defined(__i386__) || defined(__x86_64__)
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#define HAS_XGETBV
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static uint32 XGetBV(unsigned int xcr) {
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uint32 xcr_feature_mask;
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asm volatile ( // NOLINT
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".byte 0x0f, 0x01, 0xd0\n"
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: "=a"(xcr_feature_mask)
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: "c"(xcr)
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: "memory", "cc", "edx"); // edx unused.
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return xcr_feature_mask;
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}
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#endif
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#endif // !defined(__CLR_VER) && !defined(__native_client__)
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#ifdef HAS_XGETBV
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static const int kXCR_XFEATURE_ENABLED_MASK = 0;
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#endif
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// based on libvpx arm_cpudetect.c
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// For Arm, but public to allow testing on any CPU
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LIBYUV_API
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int ArmCpuCaps(const char* cpuinfo_name) {
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FILE* f = fopen(cpuinfo_name, "r");
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if (f) {
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char buf[512];
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while (fgets(buf, 511, f)) {
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if (memcmp(buf, "Features", 8) == 0) {
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char* p = strstr(buf, " neon");
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if (p && (p[5] == ' ' || p[5] == '\n')) {
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fclose(f);
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return kCpuHasNEON;
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}
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}
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}
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fclose(f);
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}
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return 0;
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}
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#if defined(__mips__) && defined(__linux__)
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static int MipsCpuCaps(const char* search_string) {
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const char* file_name = "/proc/cpuinfo";
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char cpuinfo_line[256];
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FILE* f = NULL;
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if ((f = fopen(file_name, "r")) != NULL) {
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while (fgets(cpuinfo_line, sizeof(cpuinfo_line), f) != NULL) {
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if (strstr(cpuinfo_line, search_string) != NULL) {
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fclose(f);
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return kCpuHasMIPS_DSP;
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}
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}
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fclose(f);
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}
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/* Did not find string in the proc file, or not Linux ELF. */
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return 0;
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}
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#endif
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// CPU detect function for SIMD instruction sets.
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LIBYUV_API
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int cpu_info_ = kCpuInit; // cpu_info is not initialized yet.
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// Test environment variable for disabling CPU features. Any non-zero value
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// to disable. Zero ignored to make it easy to set the variable on/off.
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#if !defined(__native_client__)
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static bool TestEnv(const char* name) {
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const char* var = getenv(name);
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if (var) {
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if (var[0] != '0') {
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return true;
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}
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}
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return false;
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}
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#else // nacl does not support getenv().
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static bool TestEnv(const char*) {
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return false;
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}
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#endif
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LIBYUV_API
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int InitCpuFlags(void) {
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#if !defined(__CLR_VER) && defined(CPU_X86)
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int cpu_info1[4] = { 0, 0, 0, 0 };
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int cpu_info7[4] = { 0, 0, 0, 0 };
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__cpuid(cpu_info1, 1);
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__cpuid(cpu_info7, 7);
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cpu_info_ = ((cpu_info1[3] & 0x04000000) ? kCpuHasSSE2 : 0) |
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((cpu_info1[2] & 0x00000200) ? kCpuHasSSSE3 : 0) |
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((cpu_info1[2] & 0x00080000) ? kCpuHasSSE41 : 0) |
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((cpu_info1[2] & 0x00100000) ? kCpuHasSSE42 : 0) |
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((cpu_info7[1] & 0x00000200) ? kCpuHasERMS : 0) |
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((cpu_info1[2] & 0x00001000) ? kCpuHasFMA3 : 0) |
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kCpuHasX86;
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#ifdef HAS_XGETBV
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if ((cpu_info1[2] & 0x18000000) == 0x18000000 && // AVX and OSSave
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(XGetBV(kXCR_XFEATURE_ENABLED_MASK) & 0x06) == 0x06) { // Saves YMM.
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cpu_info_ |= ((cpu_info7[1] & 0x00000020) ? kCpuHasAVX2 : 0) |
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kCpuHasAVX;
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}
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#endif
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// Environment variable overrides for testing.
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if (TestEnv("LIBYUV_DISABLE_X86")) {
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cpu_info_ &= ~kCpuHasX86;
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}
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if (TestEnv("LIBYUV_DISABLE_SSE2")) {
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cpu_info_ &= ~kCpuHasSSE2;
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}
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if (TestEnv("LIBYUV_DISABLE_SSSE3")) {
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cpu_info_ &= ~kCpuHasSSSE3;
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}
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if (TestEnv("LIBYUV_DISABLE_SSE41")) {
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cpu_info_ &= ~kCpuHasSSE41;
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}
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if (TestEnv("LIBYUV_DISABLE_SSE42")) {
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cpu_info_ &= ~kCpuHasSSE42;
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}
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if (TestEnv("LIBYUV_DISABLE_AVX")) {
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cpu_info_ &= ~kCpuHasAVX;
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}
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if (TestEnv("LIBYUV_DISABLE_AVX2")) {
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cpu_info_ &= ~kCpuHasAVX2;
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}
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if (TestEnv("LIBYUV_DISABLE_ERMS")) {
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cpu_info_ &= ~kCpuHasERMS;
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}
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if (TestEnv("LIBYUV_DISABLE_FMA3")) {
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cpu_info_ &= ~kCpuHasFMA3;
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}
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#elif defined(__mips__) && defined(__linux__)
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// Linux mips parse text file for dsp detect.
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cpu_info_ = MipsCpuCaps("dsp"); // set kCpuHasMIPS_DSP.
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#if defined(__mips_dspr2)
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cpu_info_ |= kCpuHasMIPS_DSPR2;
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#endif
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cpu_info_ |= kCpuHasMIPS;
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if (getenv("LIBYUV_DISABLE_MIPS")) {
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cpu_info_ &= ~kCpuHasMIPS;
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}
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if (getenv("LIBYUV_DISABLE_MIPS_DSP")) {
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cpu_info_ &= ~kCpuHasMIPS_DSP;
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}
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if (getenv("LIBYUV_DISABLE_MIPS_DSPR2")) {
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cpu_info_ &= ~kCpuHasMIPS_DSPR2;
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}
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#elif defined(__arm__)
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#if defined(__linux__) && (defined(__ARM_NEON__) || defined(LIBYUV_NEON)) && \
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!defined(__native_client__)
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// Linux arm parse text file for neon detect.
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cpu_info_ = ArmCpuCaps("/proc/cpuinfo");
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#elif defined(__ARM_NEON__) || defined(__native_client__)
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// gcc -mfpu=neon defines __ARM_NEON__
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// Enable Neon if you want support for Neon and Arm, and use MaskCpuFlags
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// to disable Neon on devices that do not have it.
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cpu_info_ = kCpuHasNEON;
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#endif
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cpu_info_ |= kCpuHasARM;
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if (TestEnv("LIBYUV_DISABLE_NEON")) {
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cpu_info_ &= ~kCpuHasNEON;
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}
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#endif // __arm__
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if (TestEnv("LIBYUV_DISABLE_ASM")) {
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cpu_info_ = 0;
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}
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return cpu_info_;
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}
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LIBYUV_API
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void MaskCpuFlags(int enable_flags) {
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cpu_info_ = InitCpuFlags() & enable_flags;
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}
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#ifdef __cplusplus
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} // extern "C"
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} // namespace libyuv
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#endif
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