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https://chromium.googlesource.com/libyuv/libyuv
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- Add kCpuHasAVXVNNI flag - Remove deprecated GFNI detect to make space. Meteor Lake has AVX-VNNI but not AVX512 ~/intelsde/sde -mtl -- blaze-bin/third_party/libyuv/libyuv_test --gunit_filter=*CpuHas doyuv3 Note: Google Test filter = *CpuHas [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from LibYUVBaseTest [ RUN ] LibYUVBaseTest.TestCpuHas Cpu Flags 0x203ff1 Has X86 0x10 Has SSE2 0x20 Has SSSE3 0x40 Has SSE41 0x80 Has SSE42 0x100 Has AVX 0x200 Has AVX2 0x400 Has ERMS 0x800 Has FMA3 0x1000 Has F16C 0x2000 Has AVX512BW 0x0 Has AVX512VL 0x0 Has AVX512VNNI 0x0 Has AVX512VBMI 0x0 Has AVX512VBMI2 0x0 Has AVX512VBITALG 0x0 Has AVX512VPOPCNTDQ 0x0 HAS AVXVNNI 0x200000 Has AVXVNNIINT8 0x0 AVX-VNNI detect - Add kCpuHasAVXVNNI flag - Remove deprecated GFNI detect to make space. https://bugs.chromium.org/p/libyuv/issues/detail?id=967 Meteor Lake has AVX-VNNI but not AVX512 ~/intelsde/sde -mtl -- blaze-bin/third_party/libyuv/libyuv_test --gunit_filter=*CpuHas doyuv3 Note: Google Test filter = *CpuHas [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from LibYUVBaseTest [ RUN ] LibYUVBaseTest.TestCpuHas Cpu Flags 0x203ff1 Has X86 0x10 Has SSE2 0x20 Has SSSE3 0x40 Has SSE41 0x80 Has SSE42 0x100 Has AVX 0x200 Has AVX2 0x400 Has ERMS 0x800 Has FMA3 0x1000 Has F16C 0x2000 Has AVX512BW 0x0 Has AVX512VL 0x0 Has AVX512VNNI 0x0 Has AVX512VBMI 0x0 Has AVX512VBMI2 0x0 Has AVX512VBITALG 0x0 Has AVX512VPOPCNTDQ 0x0 HAS AVXVNNI 0x200000 Has AVXVNNIINT8 0x0 Running on all cpus the following report avx-vnni grep 'AVXVNNI 0x2' */* adl/libyuv64.txt:HAS AVXVNNI 0x200000 gnr/libyuv64.txt:HAS AVXVNNI 0x200000 grr/libyuv64.txt:HAS AVXVNNI 0x200000 mtl/libyuv64.txt:HAS AVXVNNI 0x200000 rpl/libyuv64.txt:HAS AVXVNNI 0x200000 spr/libyuv64.txt:HAS AVXVNNI 0x200000 srf/libyuv64.txt:HAS AVXVNNI 0x200000 while these support avx512 vnni grep 'VNNI 0x1' */* clx/libyuv64.txt:Has AVX512VNNI 0x10000 cpx/libyuv64.txt:Has AVX512VNNI 0x10000 gnr/libyuv64.txt:Has AVX512VNNI 0x10000 icl/libyuv64.txt:Has AVX512VNNI 0x10000 icx/libyuv64.txt:Has AVX512VNNI 0x10000 spr/libyuv64.txt:Has AVX512VNNI 0x10000 tgl/libyuv64.txt:Has AVX512VNNI 0x10000 and these support avx-vnni-int8 grep AVXVNNIINT8.0x4 */* grr/libyuv64.txt:Has AVXVNNIINT8 0x400000 srf/libyuv64.txt:Has AVXVNNIINT8 0x400000 Bug: libyuv:967 Change-Id: I84cd71d1b320e7c284173eb695fc1d3b72d14ddb Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/4912017 Commit-Queue: Frank Barchard <fbarchard@chromium.org> Reviewed-by: richard winterton <rrwinterton@gmail.com>
131 lines
4.6 KiB
C
131 lines
4.6 KiB
C
/*
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* Copyright 2012 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "libyuv/cpu_id.h"
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#ifdef __cplusplus
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using namespace libyuv;
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#endif
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int main(int argc, const char* argv[]) {
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int cpu_flags = TestCpuFlag(-1);
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int has_arm = TestCpuFlag(kCpuHasARM);
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int has_riscv = TestCpuFlag(kCpuHasRISCV);
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int has_x86 = TestCpuFlag(kCpuHasX86);
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int has_mips = TestCpuFlag(kCpuHasMIPS);
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int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH);
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(void)argc;
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(void)argv;
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#if defined(__i386__) || defined(__x86_64__) || \
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defined(_M_IX86) || defined(_M_X64)
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if (has_x86) {
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int family, model, cpu_info[4];
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// Vendor ID:
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// AuthenticAMD AMD processor
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// CentaurHauls Centaur processor
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// CyrixInstead Cyrix processor
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// GenuineIntel Intel processor
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// GenuineTMx86 Transmeta processor
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// Geode by NSC National Semiconductor processor
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// NexGenDriven NexGen processor
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// RiseRiseRise Rise Technology processor
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// SiS SiS SiS SiS processor
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// UMC UMC UMC UMC processor
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CpuId(0, 0, &cpu_info[0]);
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cpu_info[0] = cpu_info[1]; // Reorder output
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cpu_info[1] = cpu_info[3];
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cpu_info[3] = 0;
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printf("Cpu Vendor: %s\n", (char*)(&cpu_info[0]));
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// CPU Family and Model
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// 3:0 - Stepping
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// 7:4 - Model
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// 11:8 - Family
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// 13:12 - Processor Type
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// 19:16 - Extended Model
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// 27:20 - Extended Family
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CpuId(1, 0, &cpu_info[0]);
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family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
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model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
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printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family,
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model, model);
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}
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#endif
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printf("Cpu Flags 0x%x\n", cpu_flags);
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if (has_arm) {
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int has_neon = TestCpuFlag(kCpuHasNEON);
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printf("Has ARM 0x%x\n", has_arm);
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printf("Has NEON 0x%x\n", has_neon);
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}
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if (has_riscv) {
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int has_rvv = TestCpuFlag(kCpuHasRVV);
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printf("Has RISCV 0x%x\n", has_riscv);
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printf("Has RVV 0x%x\n", has_rvv);
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}
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if (has_mips) {
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int has_msa = TestCpuFlag(kCpuHasMSA);
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printf("Has MIPS 0x%x\n", has_mips);
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printf("Has MSA 0x%x\n", has_msa);
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}
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if (has_loongarch) {
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int has_lsx = TestCpuFlag(kCpuHasLSX);
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int has_lasx = TestCpuFlag(kCpuHasLASX);
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printf("Has LOONGARCH 0x%x\n", has_loongarch);
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printf("Has LSX 0x%x\n", has_lsx);
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printf("Has LASX 0x%x\n", has_lasx);
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}
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if (has_x86) {
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int has_sse2 = TestCpuFlag(kCpuHasSSE2);
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int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
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int has_sse41 = TestCpuFlag(kCpuHasSSE41);
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int has_sse42 = TestCpuFlag(kCpuHasSSE42);
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int has_avx = TestCpuFlag(kCpuHasAVX);
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int has_avx2 = TestCpuFlag(kCpuHasAVX2);
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int has_erms = TestCpuFlag(kCpuHasERMS);
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int has_fma3 = TestCpuFlag(kCpuHasFMA3);
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int has_f16c = TestCpuFlag(kCpuHasF16C);
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int has_avx512bw = TestCpuFlag(kCpuHasAVX512BW);
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int has_avx512vl = TestCpuFlag(kCpuHasAVX512VL);
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int has_avx512vnni = TestCpuFlag(kCpuHasAVX512VNNI);
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int has_avx512vbmi = TestCpuFlag(kCpuHasAVX512VBMI);
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int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2);
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int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG);
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int has_avx512vpopcntdq = TestCpuFlag(kCpuHasAVX512VPOPCNTDQ);
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int has_avxvnni = TestCpuFlag(kCpuHasAVXVNNI);
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int has_avxvnniint8 = TestCpuFlag(kCpuHasAVXVNNIINT8);
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printf("Has X86 0x%x\n", has_x86);
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printf("Has SSE2 0x%x\n", has_sse2);
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printf("Has SSSE3 0x%x\n", has_ssse3);
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printf("Has SSE4.1 0x%x\n", has_sse41);
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printf("Has SSE4.2 0x%x\n", has_sse42);
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printf("Has AVX 0x%x\n", has_avx);
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printf("Has AVX2 0x%x\n", has_avx2);
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printf("Has ERMS 0x%x\n", has_erms);
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printf("Has FMA3 0x%x\n", has_fma3);
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printf("Has F16C 0x%x\n", has_f16c);
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printf("Has AVX512BW 0x%x\n", has_avx512bw);
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printf("Has AVX512VL 0x%x\n", has_avx512vl);
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printf("Has AVX512VNNI 0x%x\n", has_avx512vnni);
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printf("Has AVX512VBMI 0x%x\n", has_avx512vbmi);
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printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2);
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printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg);
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printf("Has AVX512VPOPCNTDQ 0x%x\n", has_avx512vpopcntdq);
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printf("HAS AVXVNNI 0x%x\n", has_avxvnni);
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printf("Has AVXVNNIINT8 0x%x\n", has_avxvnniint8);
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}
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return 0;
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}
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