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3,115 Commits 4 Branches 0 Tags BSD-3-Clause 65 MiB
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Frank Barchard 64ddbbcdde [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 
- Route 32-bit x86 (__i386__ / _M_IX86) to compare_win.cc intrinsics
  and restrict compare_gcc.cc to 64-bit x86 (__x86_64__), avoiding
  x87 float rounding and enabling SSE2, AVX2, and AVX-512 on 32-bit
  and 64-bit MinGW, GCC, Clang, and MSan (LIBYUV_ENABLE_ROWWIN).
- Enable AVX-512BW on GCC >= 6 (GCC_HAS_AVX512) and add
  LIBYUV_TARGET_AVX512BW attributes to compare_gcc.cc and
  compare_win.cc.
- Refactor SsimWindowRow_C and Ssim8x8_C to use int32_t and float,
  and add SsimWindowRow_SSE2, SsimWindowRow_AVX2, and
  SsimWindowRow_AVX512BW in both compare_win.cc and compare_gcc.cc.
- Update TestSsimAnyWidth, Ssim, and BenchmarkSsim_Opt in
  compare_test.cc to use EXPECT_NEAR and deterministic test patterns
  (identical, different, similar).
- Update util/compare.cc and linux.mk to compute I420Ssim.

Performance (BenchmarkSsim_Opt, 1280x720):
uArch                        Before      After  Improvement
Intel Lion Cove (x64 AVX2) 120.2 us    68.1 us        1.76x
Intel Skymont (x64 SSE2)   249.6 us   146.8 us        1.70x
AMD Zen 3 (x64 AVX2)       314.9 us   150.2 us        2.10x
Intel Lion Cove (MinGW686) 203.7 us    77.9 us        2.61x
Intel Skymont (MinGW686)   338.8 us   167.5 us        2.02x
AMD Zen 3 (i686 AVX2)      738.4 us   206.5 us        3.58x

Quality (util/compare on 640x360 I420 test images):
Image Comparison                MSE       PSNR         SSIM
Identical (orig vs orig)       0.00  128.00 dB     1.000000
Similar (light +/-3 noise)     4.57   41.53 dB     0.956556
Degraded (16x16 blocky)       98.18   28.21 dB     0.858893
Very different (inverted)  11160.29    7.65 dB     0.000181

Co-authored-by: Martin Storsjö <martin@martin.st>
Bug: b/493910265
Test: out/Release/libyuv_unittest --gtest_filter=*Ssim*
Change-Id: I8603dab3f752af32d07ae9039502ca5da5a05425
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8618641
Reviewed-by: richard winterton <rrwinterton@gmail.com>
Commit-Queue: Frank Barchard <fbarchard@google.com>
2026-10-20 15:00:52 -07:00
build_overrides [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
docs [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
include [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
infra/config Use default xcode version in libyuv 2025-11-24 07:54:14 -08:00
riscv_script [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
source [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
tools_libyuv Remove libyuv dependency on base/ 2025-01-08 09:04:21 -08:00
unit_test [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
util [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
.clang-format clang-format libyuv 2016-11-07 17:37:23 -08:00
.gitignore DetilePlane and unittest for NEON 2022-01-31 20:05:55 +00:00
.gn [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
Android.bp [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
Android.mk [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
AUTHORS Fix same-width vertical point upsampling 2026-08-24 19:28:50 -07:00
BUILD.bazel [libyuv] Add WASM SIMD128 and Relaxed SIMD for RAWToRGB24Row 2026-10-05 17:45:41 -07:00
BUILD.gn [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
CM_linux_packages.cmake Use grep extended regex for version 2024-11-13 02:11:17 +00:00
CMakeLists.txt [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
codereview.settings [infra] remove no longer supported git cl upload setting. 2021-04-28 12:47:52 +00:00
DEPS [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
DIR_METADATA Move metadata in OWNERS files to DIR_METADATA files 2021-02-09 19:34:43 +00:00
download_vs_toolchain.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
GEMINI.md [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
libyuv.bzl [libyuv] Simplify RVV configuration in BUILD.bazel and libyuv.bzl 2026-09-08 17:50:17 -07:00
libyuv.gni [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
libyuv.gyp Stop setting --dynamic-linker for target_os="android" 2026-05-27 04:34:07 -07:00
libyuv.gypi [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
LICENSE Update Copyright notice to follow new chromium conventions. 2012-08-08 19:04:24 +00:00
linux.mk [libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86 2026-10-20 15:00:52 -07:00
OWNERS Remove magjed from OWNERS 2026-08-24 10:43:21 -07:00
PATENTS LibYuv: Adding PATENT and LICENSE files 2011-10-25 16:15:49 +00:00
PRESUBMIT.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
public.mk use unix line endings 2018-06-20 23:19:59 +00:00
pylintrc Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
README.chromium ARGBToRGB24 AVX512 with tail masking 2026-09-29 16:15:44 -07:00
README.md Update README.md and environment_variables.md for Arm 2024-09-20 00:29:33 +00:00
vpython.toml [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
vpython.toml.uv.lock [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
winarm.mk NV12 Copy, include scale_uv.h 2020-12-08 18:54:16 +00:00
WORKSPACE.bazel Add Bazel build support 2026-04-15 18:20:26 -07:00

README.md

libyuv is an open source project that includes YUV scaling and conversion functionality.

  • Scale YUV to prepare content for compression, with point, bilinear or box filter.
  • Convert to YUV from webcam formats for compression.
  • Convert to RGB formats for rendering/effects.
  • Rotate by 90/180/270 degrees to adjust for mobile devices in portrait mode.
  • Optimized for SSSE3/AVX2 on x86/x64.
  • Optimized for Neon/SVE2/SME on Arm.
  • Optimized for MSA on Mips.
  • Optimized for RVV on RISC-V.

Development

See Getting started for instructions on how to get started developing.

You can also browse the docs directory for more documentation.