libyuv

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Frank Barchard 79ca9187e5 [libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs Address x86 SIMD correctness, sanitizer, alignment, and compiler guard bugs across row_gcc.cc, row_win.cc, row_any.cc, row_common.cc, and caller dispatchers: - MSan & row_win.cc: Replace _mm512_ternarylogic_epi32 in row_win.cc (ARGBGrayRow_AVX512VNNI, ARGBToUV444MatrixRow_AVX512VNNIVBMI, and I422ToAR30Row_AVX512BW) with bitwise intrinsics modeled bit-by-bit by LLVM MSan, document the MSan intrinsic rules in GEMINI.md, and fix standalone MSan ELF PT_INTERP in BUILD.gn. Add missing USE_ROW_WIN DivideRow_16_AVX2, HalfMergeUVRow_AVX2, and Convert8To8Row_AVX2. - Out-of-bounds & AVX-512 opmask tails: Fix RGBToUVMatrixRow_Any_SSSE3 MASK from 7 to 15 (24-byte overread), guard UnpackMT2T_C and UnpackMT2T_AVX2 against partial < 80-byte tail blocks, add inline k1-k7 opmask tails to all 17 remaining AVX-512 row kernels (removing all _Any_AVX512 wrappers), and enable opmask-tailed NV21ToYUV24Row_AVX512VBMI. - Math, saturation & pointer bugs: Fix MirrorRow_16_AVX512BW 64-bit width sign extension, ARGBPolynomialRow_AVX2 vpackssdw clamping, CumulativeSumToAverageRow_AVX2 small-area (area <= 1) handling and vdivss precision, HalfWidthRow_16To8_{SSSE3,AVX2,AVX512BW} unsigned pair summation for samples >= 0x8000, HalfRow_16To8_AVX512BW non-power-of-two scale multiplication, DivideRow_16 SIMD scale == 65536 (16-bit depth) truncation, ARGBLumaColorTableRow_AVX2 unsigned luma weight accumulation, Merge{ARGB,XRGB}16To8Row_AVX2 depth == 8 clamping, custom ArgbConstants::kAddUV loading, 16-bit YUV unsigned shifts/ORs, and null-pointer checks in NV16ToI420/NV24ToI420. - Alignment (#GP), ISA (#UD), UBSan & 32-bit x86: Use unaligned loads for ArgbConstants, YuvConstants, and ARGBPolynomialRow_SSE2 float coefficients; remove AVX2 instructions from HalfFloat{,1}Row_F16C; fix Merge{AR,XR}64Row_AVX2 depth == 16 shift UB and ByteToFloatRow_C / TestByteToFloat float alignment UB; and fix 32-bit -m32 -fPIC ASan inline asm register pressure and operand suffixes. - GCC & compiler guards: Enable GCC_HAS_AVX512 for GCC >= 9 on x86_64 with per-function target attributes, gate HAS__AVX2 and HAS__AVX512* macros on compiler version macros, add missing #ifdef HAS_* guards in row_gcc.cc, fix _Any / IS_ALIGNED step mismatches, wire missing dispatchers (ARGBSobelize, SplitRotateUV180, HalfMergeUVPlane, ARGBPolynomial), and silence GCC 15 -Werror=stringop-overflow=. Convert SIMD ISA per _C ( = uncalled in library): ------------------------------------------------------------------------ C Function arm x86 riscv hexagon wasm loong ------------------------------------------------------------------------ AB64ToARGBRow_C NEON AVX2 RVV HVX - - ABGRToAR30Row_C NEON AVX512BW - - - - AR30ToAB30Row_C NEON AVX512BW - - - - AR30ToABGRRow_C NEON AVX512BW - - - - AR30ToARGBRow_C NEON AVX512BW - - - - AR64ShuffleRow_C NEON AVX512BW RVV - RELAXED LASX AR64ToAB64Row_C NEON AVX512BW RVV HVX RELAXED LASX AR64ToARGBRow_C NEON AVX2 RVV HVX - - ARGB1555ToARGBRow_C SVE2 AVX512BW - - SIMD LASX ARGB1555ToUVMatrixRow_C NEON AVX2 - - SIMD - ARGB1555ToUVRow_C * NEON AVX2 - - - LASX ARGB1555ToYMatrixRow_C NEON AVX2 - - SIMD - ARGB1555ToYRow_C * NEON AVX2 - - - LASX ARGB4444ToARGBRow_C NEON AVX2 - - SIMD LASX ARGB4444ToUVMatrixRow_C NEON AVX2 - - SIMD - ARGB4444ToUVRow_C * NEON AVX2 - - - - ARGB4444ToYMatrixRow_C NEON AVX2 - - SIMD - ARGB4444ToYRow_C * NEON AVX2 - - - - ARGBAddRow_C NEON AVX2 - HVX - LASX ARGBAffineRow_C * NEON AVX2 - - - - ARGBAlphaBlendRow_C SME AVX512BW RVV HVX SIMD LASX ARGBAttenuateRow_C NEON AVX512BW RVV HVX - LASX ARGBBlendRow_C NEON AVX512BW RVV HVX RELAXED LASX ARGBColorMatrixRow_C I8MM AVX512VNNI - - - LASX ARGBColorTableRow_C NEON AVX2 - - - - ARGBCopyAlphaRow_C NEON AVX2 - HVX - - ARGBCopyYToAlphaRow_C NEON AVX512BW RVV HVX RELAXED - ARGBExtractAlphaRow_C NEON AVX512BW RVV HVX SIMD LASX ARGBGrayRow_C DOTPROD AVX512VNNI - - - LASX ARGBLumaColorTableRow_C NEON AVX2 - - - - ARGBMirrorRow_C NEON AVX512BW RVV HVX SIMD LASX ARGBMultiplyRow_C SME AVX512BW RVV HVX - LASX ARGBOrRow_C SME AVX512BW RVV HVX SIMD LASX ARGBPolynomialRow_C NEON AVX2 - - - - ARGBQuantizeRow_C NEON AVX2 - - - LASX ARGBSepiaRow_C DOTPROD AVX512VNNI - - - LASX ARGBSetRow_C NEON AVX2 RVV HVX - LASX ARGBShadeRow_C NEON AVX2 - - - LASX ARGBShuffleRow_C NEON AVX512BW RVV - RELAXED LASX ARGBSubtractRow_C NEON AVX2 - HVX - LASX ARGBToAB64Row_C NEON AVX2 RVV HVX - - ARGBToABGRRow_C NEON AVX512BW RVV HVX RELAXED LASX ARGBToAR30Row_C NEON AVX512BW - - - - ARGBToAR64Row_C NEON AVX2 RVV HVX - - ARGBToARGB1555Row_C NEON AVX2 - - SIMD LASX ARGBToARGB4444Row_C NEON AVX2 - - SIMD LASX ARGBToBGRARow_C NEON AVX512BW RVV HVX RELAXED LASX ARGBToRAWRow_C SVE2 AVX512BW RVV - - LASX ARGBToRGB24Row_C SVE2 AVX512BW RVV - - LASX ARGBToRGB565DitherRow_C SVE2 AVX512BW - - SIMD LASX ARGBToRGB565Row_C SVE2 AVX512BW - - SIMD LASX ARGBToRGBARow_C NEON AVX512BW RVV HVX RELAXED LASX ARGBToUV444MatrixRow_C I8MM AVX512VNNI RVV HVX RELAXED - ARGBToUVMatrixRow_C SME AVX512VNNI RVV HVX SIMD - ARGBToYMatrixRow_C SME AVX512VNNI RVV HVX SIMD LASX ARGBUnattenuateRow_C NEON AVX2 - - - - AYUVToUVRow_C SVE2 AVX512VBMI - - - - AYUVToVURow_C SVE2 AVX512VBMI - - - - AYUVToYRow_C NEON AVX512VBMI - - - - BlendPlaneRow_C NEON AVX512BW RVV HVX SIMD - ByteToFloatRow_C NEON AVX2 - - - - ComputeCumulativeSumRow_C NEON AVX2 - - - - Convert16To8Row_C SME AVX512BW RVV HVX - - Convert8To16Row_C SME AVX512BW RVV HVX SIMD - Convert8To8Row_C SME AVX512BW - HVX - - CopyRow_16_C NEON AVX2 - HVX - - CopyRow_C SME AVX512BW RVV HVX - LASX CumulativeSumToAverageRow_C NEON AVX2 - - - - DetileRow_16_C NEON AVX2 - - - - DetileRow_C NEON AVX2 - - - - DetileSplitUVRow_C NEON AVX2 - - - - DetileToYUY2_C NEON AVX2 - - - - DivideRow_16_C SVE2 AVX512BW - HVX - - GaussCol_C * NEON AVX2 - - - - GaussCol_F32_C NEON AVX2 - - - - GaussRow_C * NEON AVX2 - - - - GaussRow_F32_C NEON AVX2 - - - - HalfFloatRow_C SVE2 AVX512BW - - - LASX HalfMergeUVRow_C SVE2 AVX512BW - - - - HalfRow_16To8_C SME AVX512BW RVV HVX - - HalfRow_16_C - AVX2 - - - - HalfRow_C - AVX2 - - - - HalfWidthRow_16To8_C SME AVX512BW RVV - - - HalfWidthRow_16To8_Odd_C - AVX2 - - - - I210AlphaToARGBRow_C SME AVX512BW - - - - I210ToAR30Row_C SME AVX512BW - - - - I210ToARGBRow_C SME AVX512BW - - - - I212ToAR30Row_C SME AVX512BW - - - - I212ToARGBRow_C SME AVX512BW - - - - I400ToARGBRow_C SME AVX512BW RVV HVX - LASX I410AlphaToARGBRow_C SME AVX512BW - - - - I410ToAR30Row_C SME AVX512BW - - - - I410ToARGBRow_C SME AVX512BW - - - - I422AlphaToARGBRow_C SME AVX512BW RVV HVX - LASX I422ToAR30Row_C SME AVX512BW RVV - SIMD - I422ToARGB1555Row_C SME AVX512BW - - SIMD LASX I422ToARGB4444Row_C SME AVX512BW - - SIMD LASX I422ToARGBRow_C SME AVX512BW RVV HVX SIMD LASX I422ToRGB24Row_C SME AVX512VBMI RVV - RELAXED LASX I422ToRGB565Row_C SME AVX512BW - - SIMD LASX I422ToRGBARow_C SME AVX512BW RVV HVX - LASX I422ToUYVYRow_C NEON AVX2 - - - LASX I422ToYUY2Row_C NEON AVX2 - - - LASX I444AlphaToARGBRow_C SME AVX512BW RVV HVX - - I444ToARGBRow_C SME AVX512BW RVV HVX - LASX I444ToRGB24Row_C SME AVX512VBMI RVV - - - InterpolateRow_16_C SME AVX512BW - HVX SIMD - InterpolateRow_C SME AVX512BW RVV HVX SIMD LASX J400ToARGBRow_C NEON AVX512BW RVV HVX RELAXED LASX MergeAR64Row_C NEON AVX2 - - - - MergeARGB16To8Row_C NEON AVX2 - - - - MergeARGBRow_C NEON AVX2 RVV HVX - - MergeRGBRow_C NEON AVX512VBMI RVV - - - MergeUVRow_16_C SME AVX512BW - HVX - - MergeUVRow_C SME AVX512BW RVV HVX SIMD LASX MergeXR30Row_C NEON AVX512BW - - - - MergeXR64Row_C NEON AVX2 - - - - MergeXRGB16To8Row_C NEON AVX2 - - - - MergeXRGBRow_C NEON AVX2 RVV HVX - - MirrorRow_16_C NEON AVX512BW RVV HVX RELAXED LASX MirrorRow_C NEON AVX512BW - HVX RELAXED LASX MirrorSplitUVRow_C NEON AVX512BW - HVX RELAXED LASX MirrorUVRow_C NEON AVX512BW RVV HVX RELAXED LASX MultiplyRow_16_C SME AVX512BW RVV HVX SIMD - NV12ToARGBRow_C SME AVX512BW RVV HVX SIMD LASX NV12ToRGB24Row_C SME AVX512VBMI RVV - - - NV12ToRGB565Row_C NEON AVX2 - - SIMD LASX NV21ToARGBRow_C SME AVX512BW RVV HVX SIMD LASX NV21ToRGB24Row_C SME AVX512VBMI RVV - - - NV21ToYUV24Row_C NEON AVX512VBMI - - - - P210ToAR30Row_C SME AVX512BW - - - - P210ToARGBRow_C SME AVX512BW - - - - P410ToAR30Row_C SME AVX512BW - - - - P410ToARGBRow_C SME AVX512BW - - - - RAWToARGBRow_C SVE2 AVX512BW RVV - RELAXED LASX RAWToRGB24Row_C SVE2 AVX512VBMI RVV - RELAXED LASX RAWToRGBARow_C SVE2 AVX512VBMI RVV - - - RGB24MirrorRow_C NEON AVX512VBMI - - RELAXED - RGB24ToARGBRow_C SVE2 AVX512BW RVV - RELAXED LASX RGB565ToARGBRow_C NEON AVX2 - - SIMD LASX RGB565ToUVMatrixRow_C NEON AVX2 - - SIMD - RGB565ToUVRow_C * NEON AVX2 - - - LASX RGB565ToYMatrixRow_C NEON AVX2 - - SIMD - RGB565ToYRow_C * NEON AVX2 - - - LASX RGBAToARGBRow_C NEON AVX512BW RVV HVX RELAXED LASX RGBColorTableRow_C NEON AVX2 - - - - RGBToUV444MatrixRow_C NEON AVX512BW RVV - RELAXED - RGBToUVMatrixRow_C NEON AVX512BW RVV - RELAXED - RGBToYMatrixRow_C DOTPROD AVX512BW RVV - RELAXED LASX ScaleMaxSamples_C * NEON AVX2 - - - - ScaleSamples_C * NEON AVX2 - - - - ScaleSumSamples_C * NEON AVX2 - - - - SetRow_C NEON AVX2 - HVX - LASX SobelRow_C NEON AVX2 - - - LASX SobelToPlaneRow_C NEON AVX2 - - - LASX SobelXRow_C NEON AVX2 - - - - SobelXYRow_C NEON AVX2 - - - LASX SobelYRow_C NEON AVX2 - - - - SplitARGBRow_C NEON AVX2 RVV HVX - - SplitRGBRow_C NEON AVX2 RVV - - - SplitUVRow_16_C NEON AVX2 - HVX - - SplitUVRow_C SVE2 AVX512BW RVV HVX - LASX SplitXRGBRow_C NEON AVX2 RVV HVX - - SwapUVRow_C NEON AVX512BW RVV HVX SIMD - UYVYToARGBRow_C SME AVX512BW - - - LASX UYVYToUV422Row_C NEON AVX2 - HVX - LASX UYVYToUVRow_C SVE2 AVX512BW - HVX - LASX UYVYToYRow_C SVE2 AVX512BW - HVX - LASX UnpackMT2T_C NEON AVX2 - - - - YUY2ToARGBRow_C SME AVX512BW - - - LASX YUY2ToNVUVRow_C NEON AVX2 - - - - YUY2ToUV422Row_C NEON AVX2 - HVX - LASX YUY2ToUVRow_C SVE2 AVX512BW - HVX - LASX YUY2ToYRow_C SVE2 AVX512BW - HVX - LASX ------------------------------------------------------------------------ SIMD (174 convert) 171 98% 174 100% 65 37% 64 37% 57 33% 76 44% ------------------------------------------------------------------------ Rotate SIMD ISA per _C ( = uncalled in library): ------------------------------------------------------------------------ C Function arm x86 riscv hexagon wasm loong ------------------------------------------------------------------------ TransposeUVWx16_C - AVX512BW - - SIMD LASX TransposeUVWx8_C NEON AVX512BW - HVX SIMD LASX TransposeWx16_C NEON AVX512BW - - SIMD LASX TransposeWx4_32_C * SVE2 AVX512BW RVV HVX SIMD LASX TransposeWx8_16_C SVE2 AVX512BW RVV HVX SIMD LASX TransposeWx8_C NEON AVX512BW - HVX SIMD LASX TransposeWxH_32_C NEON AVX2 RVV HVX - - ------------------------------------------------------------------------ SIMD (7 rotate) 6 86% 7 100% 3 43% 5 71% 6 86% 6 86% ------------------------------------------------------------------------ Compare SIMD ISA per _C: ------------------------------------------------------------------------ C Function arm x86 riscv hexagon wasm loong ------------------------------------------------------------------------ ARGBDetectRow_C - AVX2 - - - - HammingDistance_C DOTPROD AVX512BW - HVX SIMD - HashDjb2_C NEON AVX512BW - HVX SIMD - Ssim4x4Row_C SME AVX512BW RVV HVX SIMD LASX SsimWindowRow_C SME AVX512BW RVV - - - SumSquareError_C DOTPROD AVX512VNNI - HVX SIMD - ------------------------------------------------------------------------ SIMD (6 compare) 5 83% 6 100% 2 33% 4 67% 4 67% 1 17% ------------------------------------------------------------------------ Scale SIMD ISA per _C: ------------------------------------------------------------------------ C Function arm x86 riscv hexagon wasm loong ------------------------------------------------------------------------ FixedDiv1_C - X86 - - - - FixedDiv_C - X86 - - - - ScaleARGBCols64_C - - - - - - ScaleARGBColsUp2_C - AVX2 - - SIMD - ScaleARGBCols_C NEON AVX2 - - SIMD LSX ScaleARGBFilterCols64_C - - - - - - ScaleARGBFilterCols_C NEON AVX2 RVV - SIMD LSX ScaleARGBRowDown2Box_C SME AVX2 RVV HVX SIMD LSX ScaleARGBRowDown2Linear_C SME AVX2 RVV HVX SIMD LSX ScaleARGBRowDown2_C SME AVX2 RVV HVX SIMD LSX ScaleARGBRowDownEvenBox_C NEON AVX2 RVV - SIMD LSX ScaleARGBRowDownEven_C NEON AVX2 - - SIMD LSX ScaleAddCols0_C - - - - - - ScaleAddCols1_16_C - - - - - - ScaleAddCols1_C - AVX512BW - - - - ScaleAddCols2_16_C - - - - - - ScaleAddCols2_C - AVX512BW - - - - ScaleAddRow_16_C - - - - - - ScaleAddRow_C NEON AVX512BW RVV HVX SIMD LSX ScaleColsUp2_16_C - - - - - - ScaleColsUp2_C - AVX2 - - - - ScaleCols_16_C - - - - - - ScaleCols_C - - - - - - ScaleFilterCols64_16_C - - - - - - ScaleFilterCols64_C - - - - - - ScaleFilterCols_16_C - - - - - - ScaleFilterCols_C NEON AVX2 - - SIMD LSX ScaleRowDown2Box_16_C SME AVX2 - HVX - - ScaleRowDown2Box_C SME AVX512BW RVV HVX SIMD LSX ScaleRowDown2Box_Odd_C - AVX512BW - HVX - - ScaleRowDown2Linear_16_C SME AVX2 - HVX - - ScaleRowDown2Linear_C SME AVX512BW RVV HVX SIMD LSX ScaleRowDown2_16_C SME AVX2 - HVX - - ScaleRowDown2_C SME AVX512BW RVV HVX SIMD LSX ScaleRowDown34_0_Box_16_C - - - - - - ScaleRowDown34_0_Box_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown34_16_C - - - - - - ScaleRowDown34_1_Box_16_C - - - - - - ScaleRowDown34_1_Box_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown34_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown38_16_C - - - - - - ScaleRowDown38_2_Box_16_C - - - - - - ScaleRowDown38_2_Box_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown38_3_Box_16_C - - - - - - ScaleRowDown38_3_Box_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown38_C NEON AVX2 RVV - RELAXED LSX ScaleRowDown4Box_16_C - - - - - - ScaleRowDown4Box_C NEON AVX2 RVV HVX SIMD LSX ScaleRowDown4_16_C - - - - - - ScaleRowDown4_C NEON AVX2 RVV HVX SIMD LSX ScaleRowUp2_Bilinear_16_Any_C NEON AVX2 - - - - ScaleRowUp2_Bilinear_16_C NEON AVX2 - - - - ScaleRowUp2_Bilinear_Any_C NEON AVX2 RVV - - - ScaleRowUp2_Bilinear_C NEON AVX2 RVV - - - ScaleRowUp2_Linear_16_Any_C NEON AVX2 - - - - ScaleRowUp2_Linear_16_C NEON AVX2 - - - - ScaleRowUp2_Linear_Any_C NEON AVX2 RVV - - - ScaleRowUp2_Linear_C NEON AVX2 RVV - - - ScaleUVAddCols1_16_C - - - - - - ScaleUVAddCols1_C - - - - - - ScaleUVAddCols2_16_C - - - - - - ScaleUVAddCols2_C - - - - - - ScaleUVAddCols3_16_C - - - - - - ScaleUVAddCols3_C SME AVX512VBMI RVV HVX SIMD LSX ScaleUVCols64_16_C - - - - - - ScaleUVCols64_C - - - - - - ScaleUVColsUp2_16_C - - - - - - ScaleUVColsUp2_C - - - - - - ScaleUVCols_16_C - - - - - - ScaleUVCols_C - - - - - - ScaleUVFilterCols64_16_C - - - - - - ScaleUVFilterCols64_C - - - - - - ScaleUVFilterCols_16_C - - - - - - ScaleUVFilterCols_C - - - - - - ScaleUVRowDown2Box_16_C - - - - - - ScaleUVRowDown2Box_C SME AVX2 RVV HVX - - ScaleUVRowDown2Linear_16_C - - - - - - ScaleUVRowDown2Linear_C SME AVX2 RVV HVX - - ScaleUVRowDown2_16_C - - - - - - ScaleUVRowDown2_C SME AVX2 RVV HVX - - ScaleUVRowDownEvenBox_16_C - - - - - - ScaleUVRowDownEvenBox_C - - - - - - ScaleUVRowDownEven_16_C - - - - - - ScaleUVRowDownEven_C NEON AVX2 RVV - - - ScaleUVRowUp2_Bilinear_16_Any_C NEON AVX2 - - - - ScaleUVRowUp2_Bilinear_16_C NEON AVX2 - - - - ScaleUVRowUp2_Bilinear_Any_C NEON AVX2 RVV - - - ScaleUVRowUp2_Bilinear_C NEON AVX2 RVV - - - ScaleUVRowUp2_Linear_16_Any_C NEON AVX2 - - - - ScaleUVRowUp2_Linear_16_C NEON AVX2 - - - - ScaleUVRowUp2_Linear_Any_C NEON AVX2 RVV - - - ScaleUVRowUp2_Linear_C NEON AVX2 RVV - - - ------------------------------------------------------------------------ SIMD (92 scale) 44 48% 51 55% 30 33% 17 18% 22 24% 21 23% ------------------------------------------------------------------------ Test: libyuv_unittest (Release, row_win, x86_32, Sanitizers, GCC 15) Bug: 388428508, 578615529, 579659306 Change-Id: Id4eaf5f7fd85c75a60984a3b1559bfdb07b21afc Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8686033 Reviewed-by: richard winterton <rrwinterton@gmail.com>		2026-10-30 14:51:16 -07:00
build_overrides	[vpython] Migrate .vpython3 to vpython.toml	2026-09-18 00:28:26 -07:00
docs	[libyuv] Upgrade x86 SIMD to AVX2/AVX-512 with 32-bit & row_win parity	2026-10-29 12:46:05 -07:00
include	[libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs	2026-10-30 14:51:16 -07:00
infra/config	Use default xcode version in libyuv	2025-11-24 07:54:14 -08:00
riscv_script	[libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking	2026-09-28 10:59:30 -07:00
source	[libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs	2026-10-30 14:51:16 -07:00
tools_libyuv	Remove libyuv dependency on base/	2025-01-08 09:04:21 -08:00
unit_test	[libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs	2026-10-30 14:51:16 -07:00
util	[libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs	2026-10-30 14:51:16 -07:00
.clang-format	clang-format libyuv	2016-11-07 17:37:23 -08:00
.gitignore	DetilePlane and unittest for NEON	2022-01-31 20:05:55 +00:00
.gn	[libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs	2026-10-30 14:51:16 -07:00
Android.bp	[libyuv] Add Qualcomm Hexagon HVX SIMD support	2026-10-19 14:16:18 -07:00
Android.mk	[libyuv] Add Qualcomm Hexagon HVX SIMD support	2026-10-19 14:16:18 -07:00
AUTHORS	Fix same-width vertical point upsampling	2026-08-24 19:28:50 -07:00
BUILD.bazel	[libyuv] Add WASM SIMD128 and Relaxed SIMD for RAWToRGB24Row	2026-10-05 17:45:41 -07:00
BUILD.gn	[libyuv] Fix MSan AVX-512 intrinsics and standalone dynamic linker	2026-10-30 14:31:28 -07:00
CM_linux_packages.cmake	Use grep extended regex for version	2024-11-13 02:11:17 +00:00
CMakeLists.txt	[libyuv] Add Qualcomm Hexagon HVX SIMD support	2026-10-19 14:16:18 -07:00
codereview.settings	[infra] remove no longer supported `git cl upload` setting.	2021-04-28 12:47:52 +00:00
DEPS	[build] Use hermetic python3 for script_executable in .gn	2026-09-28 06:02:39 -07:00
DIR_METADATA	Move metadata in OWNERS files to DIR_METADATA files	2021-02-09 19:34:43 +00:00
download_vs_toolchain.py	Update pylintrc to a pep-8 like style	2024-12-18 05:38:56 -08:00
GEMINI.md	[libyuv] Fix MSan AVX-512 intrinsics and standalone dynamic linker	2026-10-30 14:31:28 -07:00
libyuv.bzl	[libyuv] Simplify RVV configuration in BUILD.bazel and libyuv.bzl	2026-09-08 17:50:17 -07:00
libyuv.gni	[libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking	2026-09-28 10:59:30 -07:00
libyuv.gyp	Stop setting --dynamic-linker for target_os="android"	2026-05-27 04:34:07 -07:00
libyuv.gypi	[libyuv] Add Qualcomm Hexagon HVX SIMD support	2026-10-19 14:16:18 -07:00
LICENSE	Update Copyright notice to follow new chromium conventions.	2012-08-08 19:04:24 +00:00
linux.mk	[libyuv] Optimize SsimWindowRow with SIMD and use compare_win on x86	2026-10-20 15:00:52 -07:00
OWNERS	Remove magjed from OWNERS	2026-08-24 10:43:21 -07:00
PATENTS	LibYuv: Adding PATENT and LICENSE files	2011-10-25 16:15:49 +00:00
PRESUBMIT.py	Update pylintrc to a pep-8 like style	2024-12-18 05:38:56 -08:00
public.mk	use unix line endings	2018-06-20 23:19:59 +00:00
pylintrc	Update pylintrc to a pep-8 like style	2024-12-18 05:38:56 -08:00
README.chromium	[libyuv] Upgrade x86 SIMD to AVX2/AVX-512 with 32-bit & row_win parity	2026-10-29 12:46:05 -07:00
README.md	Update README.md and environment_variables.md for Arm	2024-09-20 00:29:33 +00:00
vpython.toml	[vpython] Migrate .vpython3 to vpython.toml	2026-09-18 00:28:26 -07:00
vpython.toml.uv.lock	[vpython] Migrate .vpython3 to vpython.toml	2026-09-18 00:28:26 -07:00
winarm.mk	NV12 Copy, include scale_uv.h	2020-12-08 18:54:16 +00:00
WORKSPACE.bazel	Add Bazel build support	2026-04-15 18:20:26 -07:00

README.md

libyuv is an open source project that includes YUV scaling and conversion functionality.

Scale YUV to prepare content for compression, with point, bilinear or box filter.
Convert to YUV from webcam formats for compression.
Convert to RGB formats for rendering/effects.
Rotate by 90/180/270 degrees to adjust for mobile devices in portrait mode.
Optimized for SSSE3/AVX2 on x86/x64.
Optimized for Neon/SVE2/SME on Arm.
Optimized for MSA on Mips.
Optimized for RVV on RISC-V.

Development

See Getting started for instructions on how to get started developing.

You can also browse the docs directory for more documentation.