mirror of
https://chromium.googlesource.com/libyuv/libyuv
synced 2025-12-06 16:56:55 +08:00
ef52c1658a
Run with sde only -dmr reports AVX10.2
emr:Has AVX10_2 0x0
adl:Has AVX10_2 0x0
icx:Has AVX10_2 0x0
snb:Has AVX10_2 0x0
tnt:Has AVX10_2 0x0
icl:Has AVX10_2 0x0
slm:Has AVX10_2 0x0
dmr:Has AVX10_2 0x2000000
cwf:Has AVX10_2 0x0
mrm:Has AVX10_2 0x0
skx:Has AVX10_2 0x0
wsm:Has AVX10_2 0x0
gnr:Has AVX10_2 0x0
gnr256:Has AVX10_2 0x0
bdw:Has AVX10_2 0x0
cpx:Has AVX10_2 0x0
rpl:Has AVX10_2 0x0
snr:Has AVX10_2 0x0
ptl:Has AVX10_2 0x0
slt:Has AVX10_2 0x0
ivb:Has AVX10_2 0x0
spr:Has AVX10_2 0x0
tgl:Has AVX10_2 0x0
arl:Has AVX10_2 0x0
srf:Has AVX10_2 0x0
nhm:Has AVX10_2 0x0
skl:Has AVX10_2 0x0
mtl:Has AVX10_2 0x0
pnr:Has AVX10_2 0x0
glp:Has AVX10_2 0x0
lnl:Has AVX10_2 0x0
cnl:Has AVX10_2 0x0
hsw:Has AVX10_2 0x0
clx:Has AVX10_2 0x0
glm:Has AVX10_2 0x0
sde -dmr -- libyuv_test --gunit_filter=*Cpu*
[ RUN ] LibYUVBaseTest.TestCpuId
Cpu Vendor: GenuineIntel 0x756e6547 0x49656e69 0x6c65746e
Cpu Family 6 (0x6), Model 214 (0xd6)
[ OK ] LibYUVBaseTest.TestCpuId (34 ms)
[ RUN ] LibYUVBaseTest.TestCpuHas
Kernel Version 6.10
Has X86 0x8
Has SSE2 0x100
Has SSSE3 0x200
Has SSE4.1 0x400
Has SSE4.2 0x800
Has AVX 0x1000
Has AVX2 0x2000
Has ERMS 0x4000
Has FSMR 0x8000
Has FMA3 0x10000
Has F16C 0x20000
Has AVX512BW 0x40000
Has AVX512VL 0x80000
Has AVX512VNNI 0x100000
Has AVX512VBMI 0x200000
Has AVX512VBMI2 0x400000
Has AVX512VBITALG 0x800000
Has AVX10 0x1000000
Has AVX10_2 0x2000000
HAS AVXVNNI 0x4000000
Has AVXVNNIINT8 0x8000000
Has AMXINT8 0x10000000
[ OK ] LibYUVBaseTest.TestCpuHas (10 ms)
This is how oneDNN does avx10 version:
e15d2c220f/src/cpu/x64/xbyak/xbyak_util.h (L698-L701)
Bug: b/350318244
Change-Id: I6f78402fecc38a92019d137b3439d7bce950510c
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6172267
Commit-Queue: Frank Barchard <fbarchard@chromium.org>
Reviewed-by: richard winterton <rrwinterton@gmail.com>
455 lines
14 KiB
C++
455 lines
14 KiB
C++
/*
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* Copyright 2012 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#ifdef __linux__
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#include <ctype.h>
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#include <sys/utsname.h>
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#endif
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#include "../unit_test/unit_test.h"
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#include "libyuv/basic_types.h"
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#include "libyuv/cpu_id.h"
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#include "libyuv/version.h"
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namespace libyuv {
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || \
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defined(_M_X64)
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TEST_F(LibYUVBaseTest, TestCpuId) {
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int has_x86 = TestCpuFlag(kCpuHasX86);
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if (has_x86) {
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int cpu_info[4];
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// Vendor ID:
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// AuthenticAMD AMD processor
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// CentaurHauls Centaur processor
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// CyrixInstead Cyrix processor
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// GenuineIntel Intel processor
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// GenuineTMx86 Transmeta processor
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// Geode by NSC National Semiconductor processor
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// NexGenDriven NexGen processor
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// RiseRiseRise Rise Technology processor
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// SiS SiS SiS SiS processor
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// UMC UMC UMC UMC processor
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CpuId(0, 0, cpu_info);
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cpu_info[0] = cpu_info[1]; // Reorder output
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cpu_info[1] = cpu_info[3];
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cpu_info[3] = 0;
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printf("Cpu Vendor: %s 0x%x 0x%x 0x%x\n",
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reinterpret_cast<char*>(&cpu_info[0]), cpu_info[0], cpu_info[1],
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cpu_info[2]);
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EXPECT_EQ(12u, strlen(reinterpret_cast<char*>(&cpu_info[0])));
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// CPU Family and Model
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// 3:0 - Stepping
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// 7:4 - Model
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// 11:8 - Family
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// 13:12 - Processor Type
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// 19:16 - Extended Model
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// 27:20 - Extended Family
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CpuId(1, 0, cpu_info);
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int family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
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int model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
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printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family, model,
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model);
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}
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}
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#endif
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#ifdef __linux__
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static void KernelVersion(int* version) {
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struct utsname buffer;
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int i = 0;
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version[0] = version[1] = 0;
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if (uname(&buffer) == 0) {
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char* v = buffer.release;
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for (i = 0; *v && i < 2; ++v) {
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if (isdigit(*v)) {
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version[i++] = (int)strtol(v, &v, 10);
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}
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}
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}
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}
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#endif
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TEST_F(LibYUVBaseTest, TestCpuHas) {
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#if defined(__linux__)
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{
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int kernelversion[2];
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KernelVersion(kernelversion);
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printf("Kernel Version %d.%d\n", kernelversion[0], kernelversion[1]);
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}
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#endif // defined(__linux__)
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#if defined(__arm__) || defined(__aarch64__)
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int has_arm = TestCpuFlag(kCpuHasARM);
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if (has_arm) {
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int has_neon = TestCpuFlag(kCpuHasNEON);
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int has_neon_dotprod = TestCpuFlag(kCpuHasNeonDotProd);
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int has_neon_i8mm = TestCpuFlag(kCpuHasNeonI8MM);
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int has_sve = TestCpuFlag(kCpuHasSVE);
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int has_sve2 = TestCpuFlag(kCpuHasSVE2);
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int has_sme = TestCpuFlag(kCpuHasSME);
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printf("Has Arm 0x%x\n", has_arm);
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printf("Has Neon 0x%x\n", has_neon);
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printf("Has Neon DotProd 0x%x\n", has_neon_dotprod);
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printf("Has Neon I8MM 0x%x\n", has_neon_i8mm);
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printf("Has SVE 0x%x\n", has_sve);
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printf("Has SVE2 0x%x\n", has_sve2);
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printf("Has SME 0x%x\n", has_sme);
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#if defined(__aarch64__)
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// Read and print the SVE and SME vector lengths.
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if (has_sve) {
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int sve_vl;
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asm(".inst 0x04bf5020 \n" // rdvl x0, #1
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"mov %w[sve_vl], w0 \n"
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: [sve_vl] "=r"(sve_vl) // %[sve_vl]
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:
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: "x0");
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printf("SVE vector length: %d bytes\n", sve_vl);
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}
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if (has_sme) {
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int sme_vl;
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asm(".inst 0x04bf5820 \n" // rdsvl x0, #1
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"mov %w[sme_vl], w0 \n"
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: [sme_vl] "=r"(sme_vl) // %[sme_vl]
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:
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: "x0");
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printf("SME vector length: %d bytes\n", sme_vl);
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}
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#endif // defined(__aarch64__)
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}
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#endif // if defined(__arm__) || defined(__aarch64__)
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#if defined(__riscv)
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int has_riscv = TestCpuFlag(kCpuHasRISCV);
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if (has_riscv) {
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int has_rvv = TestCpuFlag(kCpuHasRVV);
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printf("Has RISCV 0x%x\n", has_riscv);
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printf("Has RVV 0x%x\n", has_rvv);
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// Read and print the RVV vector length.
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if (has_rvv) {
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register uint32_t vlenb __asm__("t0");
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__asm__(".word 0xC22022F3" /* CSRR t0, vlenb */ : "=r"(vlenb));
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printf("RVV vector length: %d bytes\n", vlenb);
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}
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}
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#endif // defined(__riscv)
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#if defined(__mips__)
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int has_mips = TestCpuFlag(kCpuHasMIPS);
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if (has_mips) {
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int has_msa = TestCpuFlag(kCpuHasMSA);
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printf("Has MIPS 0x%x\n", has_mips);
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printf("Has MSA 0x%x\n", has_msa);
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}
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#endif // defined(__mips__)
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#if defined(__loongarch__)
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int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH);
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if (has_loongarch) {
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int has_lsx = TestCpuFlag(kCpuHasLSX);
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int has_lasx = TestCpuFlag(kCpuHasLASX);
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printf("Has LOONGARCH 0x%x\n", has_loongarch);
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printf("Has LSX 0x%x\n", has_lsx);
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printf("Has LASX 0x%x\n", has_lasx);
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}
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#endif // defined(__loongarch__)
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || \
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defined(_M_X64)
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int has_x86 = TestCpuFlag(kCpuHasX86);
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if (has_x86) {
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int has_sse2 = TestCpuFlag(kCpuHasSSE2);
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int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
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int has_sse41 = TestCpuFlag(kCpuHasSSE41);
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int has_sse42 = TestCpuFlag(kCpuHasSSE42);
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int has_avx = TestCpuFlag(kCpuHasAVX);
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int has_avx2 = TestCpuFlag(kCpuHasAVX2);
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int has_erms = TestCpuFlag(kCpuHasERMS);
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int has_fsmr = TestCpuFlag(kCpuHasFSMR);
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int has_fma3 = TestCpuFlag(kCpuHasFMA3);
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int has_f16c = TestCpuFlag(kCpuHasF16C);
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int has_avx512bw = TestCpuFlag(kCpuHasAVX512BW);
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int has_avx512vl = TestCpuFlag(kCpuHasAVX512VL);
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int has_avx512vnni = TestCpuFlag(kCpuHasAVX512VNNI);
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int has_avx512vbmi = TestCpuFlag(kCpuHasAVX512VBMI);
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int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2);
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int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG);
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int has_avx10 = TestCpuFlag(kCpuHasAVX10);
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int has_avx10_2 = TestCpuFlag(kCpuHasAVX10_2);
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int has_avxvnni = TestCpuFlag(kCpuHasAVXVNNI);
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int has_avxvnniint8 = TestCpuFlag(kCpuHasAVXVNNIINT8);
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int has_amxint8 = TestCpuFlag(kCpuHasAMXINT8);
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printf("Has X86 0x%x\n", has_x86);
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printf("Has SSE2 0x%x\n", has_sse2);
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printf("Has SSSE3 0x%x\n", has_ssse3);
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printf("Has SSE4.1 0x%x\n", has_sse41);
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printf("Has SSE4.2 0x%x\n", has_sse42);
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printf("Has AVX 0x%x\n", has_avx);
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printf("Has AVX2 0x%x\n", has_avx2);
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printf("Has ERMS 0x%x\n", has_erms);
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printf("Has FSMR 0x%x\n", has_fsmr);
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printf("Has FMA3 0x%x\n", has_fma3);
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printf("Has F16C 0x%x\n", has_f16c);
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printf("Has AVX512BW 0x%x\n", has_avx512bw);
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printf("Has AVX512VL 0x%x\n", has_avx512vl);
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printf("Has AVX512VNNI 0x%x\n", has_avx512vnni);
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printf("Has AVX512VBMI 0x%x\n", has_avx512vbmi);
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printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2);
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printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg);
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printf("Has AVX10 0x%x\n", has_avx10);
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printf("Has AVX10_2 0x%x\n", has_avx10_2);
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printf("HAS AVXVNNI 0x%x\n", has_avxvnni);
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printf("Has AVXVNNIINT8 0x%x\n", has_avxvnniint8);
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printf("Has AMXINT8 0x%x\n", has_amxint8);
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}
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#endif // defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) ||
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// defined(_M_X64)
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}
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TEST_F(LibYUVBaseTest, TestCompilerMacros) {
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// Tests all macros used in public headers.
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#ifdef __ATOMIC_RELAXED
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printf("__ATOMIC_RELAXED %d\n", __ATOMIC_RELAXED);
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#endif
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#ifdef __cplusplus
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printf("__cplusplus %ld\n", __cplusplus);
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#endif
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#ifdef __clang_major__
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printf("__clang_major__ %d\n", __clang_major__);
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#endif
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#ifdef __clang_minor__
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printf("__clang_minor__ %d\n", __clang_minor__);
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#endif
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#ifdef __GNUC__
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printf("__GNUC__ %d\n", __GNUC__);
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#endif
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#ifdef __GNUC_MINOR__
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printf("__GNUC_MINOR__ %d\n", __GNUC_MINOR__);
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#endif
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#ifdef __i386__
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printf("__i386__ %d\n", __i386__);
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#endif
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#ifdef __x86_64__
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printf("__x86_64__ %d\n", __x86_64__);
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#endif
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#ifdef _M_IX86
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printf("_M_IX86 %d\n", _M_IX86);
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#endif
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#ifdef _M_X64
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printf("_M_X64 %d\n", _M_X64);
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#endif
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#ifdef _MSC_VER
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printf("_MSC_VER %d\n", _MSC_VER);
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#endif
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#ifdef __aarch64__
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printf("__aarch64__ %d\n", __aarch64__);
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#endif
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#ifdef __arm__
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printf("__arm__ %d\n", __arm__);
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#endif
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#ifdef __riscv
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printf("__riscv %d\n", __riscv);
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#endif
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#ifdef __riscv_vector
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printf("__riscv_vector %d\n", __riscv_vector);
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#endif
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#ifdef __riscv_v_intrinsic
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printf("__riscv_v_intrinsic %d\n", __riscv_v_intrinsic);
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#endif
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#ifdef __riscv_zve64x
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printf("__riscv_zve64x %d\n", __riscv_zve64x);
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#endif
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#ifdef __APPLE__
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printf("__APPLE__ %d\n", __APPLE__);
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#endif
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#ifdef __clang__
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printf("__clang__ %d\n", __clang__);
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#endif
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#ifdef __CLR_VER
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printf("__CLR_VER %d\n", __CLR_VER);
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#endif
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#ifdef __CYGWIN__
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printf("__CYGWIN__ %d\n", __CYGWIN__);
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#endif
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#ifdef __llvm__
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printf("__llvm__ %d\n", __llvm__);
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#endif
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#ifdef __mips_msa
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printf("__mips_msa %d\n", __mips_msa);
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#endif
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#ifdef __mips
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printf("__mips %d\n", __mips);
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#endif
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#ifdef __mips_isa_rev
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printf("__mips_isa_rev %d\n", __mips_isa_rev);
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#endif
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#ifdef _MIPS_ARCH_LOONGSON3A
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printf("_MIPS_ARCH_LOONGSON3A %d\n", _MIPS_ARCH_LOONGSON3A);
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#endif
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#ifdef __loongarch__
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printf("__loongarch__ %d\n", __loongarch__);
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#endif
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#ifdef _WIN32
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printf("_WIN32 %d\n", _WIN32);
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#endif
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#ifdef __native_client__
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printf("__native_client__ %d\n", __native_client__);
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#endif
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#ifdef __pic__
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printf("__pic__ %d\n", __pic__);
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#endif
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#ifdef __pnacl__
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printf("__pnacl__ %d\n", __pnacl__);
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#endif
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#ifdef GG_LONGLONG
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printf("GG_LONGLONG %lld\n", GG_LONGLONG(1));
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#endif
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#ifdef INT_TYPES_DEFINED
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printf("INT_TYPES_DEFINED\n");
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#endif
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#ifdef __has_feature
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printf("__has_feature\n");
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#if __has_feature(memory_sanitizer)
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printf("__has_feature(memory_sanitizer) %d\n",
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__has_feature(memory_sanitizer));
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#endif
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#endif
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}
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static int FileExists(const char* file_name) {
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FILE* f = fopen(file_name, "r");
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if (!f) {
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return 0;
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}
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fclose(f);
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return 1;
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}
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TEST_F(LibYUVBaseTest, TestLinuxArm) {
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if (FileExists("../../unit_test/testdata/arm_v7.txt")) {
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printf("Note: testing to load \"../../unit_test/testdata/arm_v7.txt\"\n");
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EXPECT_EQ(0, ArmCpuCaps("../../unit_test/testdata/arm_v7.txt"));
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EXPECT_EQ(kCpuHasNEON, ArmCpuCaps("../../unit_test/testdata/tegra3.txt"));
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} else {
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printf("WARNING: unable to load \"../../unit_test/testdata/arm_v7.txt\"\n");
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}
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#if defined(__linux__) && defined(__ARM_NEON__) && !defined(__aarch64__)
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if (FileExists("/proc/cpuinfo")) {
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if (kCpuHasNEON != ArmCpuCaps("/proc/cpuinfo")) {
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// This can happen on Arm emulator but /proc/cpuinfo is from host.
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printf("WARNING: Neon build enabled but CPU does not have Neon\n");
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}
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} else {
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printf("WARNING: unable to load \"/proc/cpuinfo\"\n");
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}
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#endif
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}
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#if defined(__linux__) && defined(__aarch64__)
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TEST_F(LibYUVBaseTest, TestLinuxAArch64) {
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// Values taken from a Cortex-A57 machine, only Neon available.
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EXPECT_EQ(kCpuHasNEON, AArch64CpuCaps(0xffU, 0x0U));
|
|
|
|
// Values taken from a Google Pixel 7.
|
|
int expected = kCpuHasNEON | kCpuHasNeonDotProd;
|
|
EXPECT_EQ(expected, AArch64CpuCaps(0x119fffU, 0x0U));
|
|
|
|
// Values taken from a Google Pixel 8.
|
|
expected = kCpuHasNEON | kCpuHasNeonDotProd | kCpuHasNeonI8MM | kCpuHasSVE |
|
|
kCpuHasSVE2;
|
|
EXPECT_EQ(expected, AArch64CpuCaps(0x3fffffffU, 0x2f33fU));
|
|
|
|
// Values taken from a Neoverse N2 machine.
|
|
EXPECT_EQ(expected, AArch64CpuCaps(0x3fffffffU, 0x2f3ffU));
|
|
|
|
// Check for SME feature detection.
|
|
expected |= kCpuHasSME;
|
|
EXPECT_EQ(expected, AArch64CpuCaps(0x3fffffffU, 0x82f3ffU));
|
|
}
|
|
#endif
|
|
|
|
TEST_F(LibYUVBaseTest, TestLinuxMipsMsa) {
|
|
if (FileExists("../../unit_test/testdata/mips.txt")) {
|
|
printf("Note: testing to load \"../../unit_test/testdata/mips.txt\"\n");
|
|
|
|
EXPECT_EQ(0, MipsCpuCaps("../../unit_test/testdata/mips.txt"));
|
|
EXPECT_EQ(kCpuHasMSA, MipsCpuCaps("../../unit_test/testdata/mips_msa.txt"));
|
|
EXPECT_EQ(kCpuHasMSA,
|
|
MipsCpuCaps("../../unit_test/testdata/mips_loongson2k.txt"));
|
|
} else {
|
|
printf("WARNING: unable to load \"../../unit_test/testdata/mips.txt\"\n");
|
|
}
|
|
}
|
|
|
|
TEST_F(LibYUVBaseTest, TestLinuxRVV) {
|
|
if (FileExists("../../unit_test/testdata/riscv64.txt")) {
|
|
printf("Note: testing to load \"../../unit_test/testdata/riscv64.txt\"\n");
|
|
|
|
EXPECT_EQ(0, RiscvCpuCaps("../../unit_test/testdata/riscv64.txt"));
|
|
EXPECT_EQ(kCpuHasRVV,
|
|
RiscvCpuCaps("../../unit_test/testdata/riscv64_rvv.txt"));
|
|
EXPECT_EQ(kCpuHasRVV | kCpuHasRVVZVFH,
|
|
RiscvCpuCaps("../../unit_test/testdata/riscv64_rvv_zvfh.txt"));
|
|
} else {
|
|
printf(
|
|
"WARNING: unable to load "
|
|
"\"../../unit_test/testdata/riscv64.txt\"\n");
|
|
}
|
|
#if defined(__linux__) && defined(__riscv)
|
|
if (FileExists("/proc/cpuinfo")) {
|
|
if (!(kCpuHasRVV & RiscvCpuCaps("/proc/cpuinfo"))) {
|
|
// This can happen on RVV emulator but /proc/cpuinfo is from host.
|
|
printf("WARNING: RVV build enabled but CPU does not have RVV\n");
|
|
}
|
|
} else {
|
|
printf("WARNING: unable to load \"/proc/cpuinfo\"\n");
|
|
}
|
|
#endif
|
|
}
|
|
|
|
// TODO(fbarchard): Fix clangcl test of cpuflags.
|
|
#ifdef _MSC_VER
|
|
TEST_F(LibYUVBaseTest, DISABLED_TestSetCpuFlags) {
|
|
#else
|
|
TEST_F(LibYUVBaseTest, TestSetCpuFlags) {
|
|
#endif
|
|
// Reset any masked flags that may have been set so auto init is enabled.
|
|
MaskCpuFlags(0);
|
|
|
|
int original_cpu_flags = TestCpuFlag(-1);
|
|
|
|
// Test setting different CPU configurations.
|
|
int cpu_flags = kCpuHasARM | kCpuHasNEON | kCpuInitialized;
|
|
SetCpuFlags(cpu_flags);
|
|
EXPECT_EQ(cpu_flags, TestCpuFlag(-1));
|
|
|
|
cpu_flags = kCpuHasX86 | kCpuInitialized;
|
|
SetCpuFlags(cpu_flags);
|
|
EXPECT_EQ(cpu_flags, TestCpuFlag(-1));
|
|
|
|
// Test that setting 0 turns auto-init back on.
|
|
SetCpuFlags(0);
|
|
EXPECT_EQ(original_cpu_flags, TestCpuFlag(-1));
|
|
|
|
// Restore the CPU flag mask.
|
|
MaskCpuFlags(benchmark_cpu_info_);
|
|
}
|
|
|
|
} // namespace libyuv
|