Frank Barchard d088b8f2bd [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes
1. Enable ARMv9 SVE2 and SME compilation with GCC 15 and Clang across
   Android.bp, BUILD.gn, CMakeLists.txt, and linux.mk using portable
   LIBYUV_SVE_ATTR, LIBYUV_SME_ATTR, and STREAMING_COMPATIBLE macros.
2. Port 46 SVE2 kernels to streaming-compatible SVE_SC functions in
   row_sve.h and expose _SME entry points for processors with SME but
   no non-streaming SVE2. Upgrade 15 1x SVE2 kernels to 2x unrolled,
   use full-vector st1b in ARGBToRGB24Row/ARGBToRAWRow_SVE2, contiguous
   ld1h/st1h in HalfFloatRow_SVE_SC, and frecpe+frecps reciprocal in
   ARGBAlphaBlendRow_SVE_SC.
3. Add missing kCpuHasNEON runtime checks in planar_test.cc and define
   missing HAS_*_NEON macros in row.h for existing NEON kernels.
4. Handle odd width directly in AYUVToUVRow_SVE_SC and
   AYUVToVURow_SVE_SC and remove redundant width alignment guards in
   AYUVToNV12 and AYUVToNV21.
5. Implement TransposeWx8_NEON for AArch64 in rotate_neon64.cc so
   TransposePlane and RotatePlane90/270 cascade 16x -> 8x -> C tail.
6. Add _Any_ wrappers for 9 ARGB/float filter functions (ARGBGrayTo,
   ARGBGray, ARGBSepia, ARGBColorMatrix, ARGBQuantize, ARGBShade,
   GaussRow_F32, GaussCol_F32, and ARGBLumaColorTable).
7. Add HalfRow and HalfRow_16 wrappers for AVX2, NEON, SVE2, and SME
   delegating to InterpolateRow{,_16} with fraction 0x80.
8. Add YUY2ToUV422Row_AVX512BW and UYVYToUV422Row_AVX512BW in
   row_gcc.cc and row_win.cc.
9. Add HalfWidthRow_16To8_Odd_NEON in row_any.cc and wire into
   I41xToI420 and Px10ToI420 for odd chroma widths.
10. Fix inline asm clobbers and vzeroupper placement in
    TransposeWx32_16_AVX512BW and TransposeWx16_32_AVX512BW, and
    re-enable 36 passing unit tests.

Test: libyuv_unittest
Bug: 579659306
Change-Id: I6b808f8b03ed424d3af4bb7941c34af05c1cb774
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8701301
Commit-Queue: Frank Barchard <fbarchard@google.com>
Reviewed-by: richard winterton <rrwinterton@gmail.com>
2026-11-02 13:46:12 -08:00
build_overrides [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
docs [libyuv] Implement 8, 16, and 32-bit transpose using x86 ACEv1 2026-11-02 10:20:25 -08:00
include [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
infra/config Use default xcode version in libyuv 2025-11-24 07:54:14 -08:00
riscv_script [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
source [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
tools_libyuv Remove libyuv dependency on base/ 2025-01-08 09:04:21 -08:00
unit_test [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
util [libyuv] Implement 8, 16, and 32-bit transpose using x86 ACEv1 2026-11-02 10:20:25 -08:00
.clang-format clang-format libyuv 2016-11-07 17:37:23 -08:00
.gitignore DetilePlane and unittest for NEON 2022-01-31 20:05:55 +00:00
.gn [libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs 2026-10-30 14:51:16 -07:00
Android.bp [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
Android.mk [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
AUTHORS Fix same-width vertical point upsampling 2026-08-24 19:28:50 -07:00
BUILD.bazel [libyuv] Add WASM SIMD128 and Relaxed SIMD for RAWToRGB24Row 2026-10-05 17:45:41 -07:00
BUILD.gn [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
CM_linux_packages.cmake Use grep extended regex for version 2024-11-13 02:11:17 +00:00
CMakeLists.txt [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
codereview.settings [infra] remove no longer supported git cl upload setting. 2021-04-28 12:47:52 +00:00
DEPS [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
DIR_METADATA Move metadata in OWNERS files to DIR_METADATA files 2021-02-09 19:34:43 +00:00
download_vs_toolchain.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
GEMINI.md [libyuv] Fix MSan AVX-512 intrinsics and standalone dynamic linker 2026-10-30 14:31:28 -07:00
libyuv.bzl [libyuv] Simplify RVV configuration in BUILD.bazel and libyuv.bzl 2026-09-08 17:50:17 -07:00
libyuv.gni [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
libyuv.gyp Stop setting --dynamic-linker for target_os="android" 2026-05-27 04:34:07 -07:00
libyuv.gypi [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
LICENSE Update Copyright notice to follow new chromium conventions. 2012-08-08 19:04:24 +00:00
linux.mk [libyuv] Add GCC 15 SME support, SVE2/SME ports, and next 10 SIMD fixes 2026-11-02 13:46:12 -08:00
OWNERS Remove magjed from OWNERS 2026-08-24 10:43:21 -07:00
PATENTS LibYuv: Adding PATENT and LICENSE files 2011-10-25 16:15:49 +00:00
PRESUBMIT.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
public.mk use unix line endings 2018-06-20 23:19:59 +00:00
pylintrc Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
README.chromium [libyuv] Upgrade x86 SIMD to AVX2/AVX-512 with 32-bit & row_win parity 2026-10-29 12:46:05 -07:00
README.md Update README.md and environment_variables.md for Arm 2024-09-20 00:29:33 +00:00
vpython.toml [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
vpython.toml.uv.lock [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
winarm.mk NV12 Copy, include scale_uv.h 2020-12-08 18:54:16 +00:00
WORKSPACE.bazel Add Bazel build support 2026-04-15 18:20:26 -07:00

libyuv is an open source project that includes YUV scaling and conversion functionality.

  • Scale YUV to prepare content for compression, with point, bilinear or box filter.
  • Convert to YUV from webcam formats for compression.
  • Convert to RGB formats for rendering/effects.
  • Rotate by 90/180/270 degrees to adjust for mobile devices in portrait mode.
  • Optimized for SSSE3/AVX2 on x86/x64.
  • Optimized for Neon/SVE2/SME on Arm.
  • Optimized for MSA on Mips.
  • Optimized for RVV on RISC-V.

Development

See Getting started for instructions on how to get started developing.

You can also browse the docs directory for more documentation.