Frank Barchard d2a6496353 [libyuv] Add LoongArch LASX parity, cpucfg CPUID, and 38 convert rows
Follow up on the LoongArch *_la.cc consolidation with runtime CPU
detection, build/test disable flags, full LASX parity for all LSX
functions, and 38 new LSX/LASX convert and planar row functions:
- Update LoongArchCpuCaps() in cpu_id.cc to detect LSX and LASX via the
  unprivileged cpucfg instruction combined with getauxval(AT_HWCAP) OS
  support, and wire GetCpuFlags() for __loongarch__.
- Support LIBYUV_DISABLE_LSX, LIBYUV_DISABLE_LASX, and
  LIBYUV_DISABLE_ASM at build time in cpu_support.h and CMakeLists.txt,
  and fix the __loongarch__ environment variable check in unit_test.cc.
- Port all 24 LSX-only Rotate and Scale kernels to 256-bit LASX so
  every LSX function has a matching LASX implementation.
- Move ScaleMaxSamples, ScaleSumSamples, and ScaleSamples from row_*
  to scale_* across all platforms and add LSX and LASX implementations
  in scale_la.cc.
- Add 38 LSX and LASX row implementations (and _Any wrappers):
  SwapUVRow, ARGBCopyYToAlphaRow, HalfMergeUVRow, Convert16To8Row,
  Convert8To16Row, MultiplyRow_16, DivideRow_16, MergeUVRow_16,
  SplitUVRow_16, CopyRow_16, HalfRow, HalfRow_16, ARGBCopyAlphaRow,
  YUY2ToNVUVRow, AR64ToARGBRow, AB64ToARGBRow, ARGBToAR64Row,
  ARGBToAB64Row, Convert8To8Row, HalfRow_16To8, AR30ToAB30Row,
  ARGBToAR30Row, ABGRToAR30Row, AR30ToARGBRow, AR30ToABGRRow,
  AYUVToYRow, AYUVToUVRow, AYUVToVURow, DetileRow, DetileRow_16,
  MergeARGBRow, MergeXRGBRow, SplitARGBRow, SplitXRGBRow, RAWToRGBARow,
  RGB24MirrorRow, BlendPlaneRow, and InterpolateRow_16.

Compare SIMD ISA per *_C:
------------------------------------------------------------------------
C Function                      x86                             LoongArch
------------------------------------------------------------------------
ARGBDetectRow_C                 AVX2                            LSX+LASX
HammingDistance_C               SSSE3+AVX2+AVX512BW+AVX512VNNI  LSX+LASX
HashDjb2_C                      SSE41+AVX2+AVX512BW             LSX+LASX
Ssim4x4Row_C                    SSE2+AVX2+AVX512BW              LSX+LASX
SsimWindowRow_C                 SSE2+AVX2+AVX512BW              LSX+LASX
SumSquareError_C                SSE2+AVX2+AVX512BW+AVX512VNNI   LSX+LASX
------------------------------------------------------------------------
Compare: 6 (100%)               6 (100%)                        6 (100%)
------------------------------------------------------------------------

Convert SIMD ISA per *_C:
------------------------------------------------------------------------
C Function                      x86                             LoongArch
------------------------------------------------------------------------
AB64ToARGBRow_C                 SSSE3+AVX2                      LSX+LASX
ABGRToAR30Row_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
AR30ToAB30Row_C                 AVX2+AVX512BW                   LSX+LASX
AR30ToABGRRow_C                 AVX2+AVX512BW                   LSX+LASX
AR30ToARGBRow_C                 AVX2+AVX512BW                   LSX+LASX
AR64ShuffleRow_C                SSSE3+AVX2+AVX512BW             LSX+LASX
AR64ToAB64Row_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
AR64ToARGBRow_C                 SSSE3+AVX2                      LSX+LASX
ARGB1555ToARGBRow_C             AVX2+AVX512BW                   LSX+LASX
ARGB1555ToUVMatrixRow_C         AVX2
ARGB1555ToUVRow_C               AVX2                            LSX+LASX
ARGB1555ToYMatrixRow_C          AVX2
ARGB1555ToYRow_C                AVX2                            LSX+LASX
ARGB4444ToARGBRow_C             AVX2                            LSX+LASX
ARGB4444ToUVMatrixRow_C         AVX2
ARGB4444ToUVRow_C               AVX2
ARGB4444ToYMatrixRow_C          AVX2
ARGB4444ToYRow_C                AVX2
ARGBAddRow_C                    SSE2+AVX2                       LSX+LASX
ARGBAffineRow_C                 AVX2
ARGBAlphaBlendRow_C             SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBAttenuateRow_C              SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBBlendRow_C                  AVX2+AVX512BW                   LSX+LASX
ARGBColorMatrixRow_C            AVX2+AVX512VNNI                 LSX+LASX
ARGBColorTableRow_C             AVX2
ARGBCopyAlphaRow_C              SSE2+AVX2                       LSX+LASX
ARGBCopyYToAlphaRow_C           SSE2+AVX2+AVX512BW              LSX+LASX
ARGBExtractAlphaRow_C           SSE2+AVX2+AVX512BW              LSX+LASX
ARGBGrayRow_C                   AVX2+AVX512BW+AVX512VNNI        LSX+LASX
ARGBLumaColorTableRow_C         AVX2
ARGBMirrorRow_C                 SSE2+AVX2+AVX512BW              LSX+LASX
ARGBMultiplyRow_C               SSE2+AVX2+AVX512BW              LSX+LASX
ARGBOrRow_C                     SSE2+AVX2+AVX512BW              LSX+LASX
ARGBPolynomialRow_C             SSE2+AVX2
ARGBQuantizeRow_C               AVX2                            LSX+LASX
ARGBSepiaRow_C                  AVX2+AVX512VNNI                 LSX+LASX
ARGBSetRow_C                    AVX2                            LSX+LASX
ARGBShadeRow_C                  AVX2                            LSX+LASX
ARGBShuffleRow_C                SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBSubtractRow_C               SSE2+AVX2                       LSX+LASX
ARGBToAB64Row_C                 SSSE3+AVX2                      LSX+LASX
ARGBToABGRRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToAR30Row_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToAR64Row_C                 SSSE3+AVX2                      LSX+LASX
ARGBToARGB1555Row_C             AVX2                            LSX+LASX
ARGBToARGB4444Row_C             AVX2                            LSX+LASX
ARGBToBGRARow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToRAWRow_C                  SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToRGB24Row_C                SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToRGB565DitherRow_C         AVX2+AVX512BW                   LSX+LASX
ARGBToRGB565Row_C               AVX2+AVX512BW                   LSX+LASX
ARGBToRGBARow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ARGBToUV444MatrixRow_C          SSSE3+AVX2+AVX512BW+AVX512VNNI+AVX512VNNIVBMI
ARGBToUVMatrixRow_C             SSSE3+AVX2+AVX512BW+AVX512VNNI+AVX512VNNIVBMI
ARGBToYMatrixRow_C              SSSE3+AVX2+AVX512BW+AVX512VNNI+AVX512VNNIVBMI LSX+LASX
ARGBUnattenuateRow_C            SSE2+AVX2
AYUVToUVRow_C                   AVX2+AVX512VBMI                 LSX+LASX
AYUVToVURow_C                   AVX2+AVX512VBMI                 LSX+LASX
AYUVToYRow_C                    AVX2+AVX512VBMI                 LSX+LASX
BlendPlaneRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ByteToFloatRow_C                AVX2
ComputeCumulativeSumRow_C       AVX2
Convert16To8Row_C               SSSE3+AVX2+AVX512BW             LSX+LASX
Convert8To16Row_C               SSE2+AVX2+AVX512BW              LSX+LASX
Convert8To8Row_C                AVX2+AVX512BW                   LSX+LASX
CopyRow_16_C                    AVX2                            LSX+LASX
CopyRow_C                       ERMS+SSE2+AVX+AVX512BW          LSX+LASX
CumulativeSumToAverageRow_C     AVX2
DetileRow_16_C                  AVX2                            LSX+LASX
DetileRow_C                     AVX2                            LSX+LASX
DetileSplitUVRow_C              AVX2
DetileToYUY2_C                  AVX2
DivideRow_16_C                  AVX2+AVX512BW                   LSX+LASX
GaussCol_C                      AVX2
GaussCol_F32_C                  AVX2
GaussRow_C                      AVX2
GaussRow_F32_C                  AVX2
HalfFloatRow_C                  F16C+AVX2+AVX512BW              LSX+LASX
HalfMergeUVRow_C                SSSE3+AVX2+AVX512BW             LSX+LASX
HalfRow_16To8_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
HalfRow_16_C                    AVX2                            LSX+LASX
HalfRow_C                       AVX2                            LSX+LASX
HalfWidthRow_16To8_C            SSSE3+AVX2+AVX512BW
HalfWidthRow_16To8_Odd_C        AVX2
I210AlphaToARGBRow_C            SSSE3+AVX2+AVX512BW
I210ToAR30Row_C                 SSSE3+AVX2+AVX512BW
I210ToARGBRow_C                 SSSE3+AVX2+AVX512BW
I212ToAR30Row_C                 SSSE3+AVX2+AVX512BW
I212ToARGBRow_C                 SSSE3+AVX2+AVX512BW
I400ToARGBRow_C                 SSE2+AVX2+AVX512BW              LSX+LASX
I410AlphaToARGBRow_C            SSSE3+AVX2+AVX512BW
I410ToAR30Row_C                 SSSE3+AVX2+AVX512BW
I410ToARGBRow_C                 SSSE3+AVX2+AVX512BW
I422AlphaToARGBRow_C            SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToAR30Row_C                 SSSE3+AVX2+AVX512BW
I422ToARGB1555Row_C             SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToARGB4444Row_C             SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToRGB24Row_C                SSSE3+AVX2+AVX512BW+AVX512VBMI  LSX+LASX
I422ToRGB565Row_C               SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToRGBARow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
I422ToUYVYRow_C                 SSE2+AVX2                       LSX+LASX
I422ToYUY2Row_C                 SSE2+AVX2                       LSX+LASX
I444AlphaToARGBRow_C            SSSE3+AVX2+AVX512BW
I444ToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
I444ToRGB24Row_C                SSSE3+AVX2+AVX512VBMI
InterpolateRow_16_C             AVX2+AVX512BW                   LSX+LASX
InterpolateRow_C                AVX2+AVX512BW                   LSX+LASX
J400ToARGBRow_C                 AVX2+AVX512BW                   LSX+LASX
MergeAR64Row_C                  AVX2
MergeARGB16To8Row_C             AVX2
MergeARGBRow_C                  SSE2+AVX2                       LSX+LASX
MergeRGBRow_C                   AVX2+AVX512VBMI
MergeUVRow_16_C                 AVX2+AVX512BW                   LSX+LASX
MergeUVRow_C                    SSE2+AVX2+AVX512BW              LSX+LASX
MergeXR30Row_C                  AVX2
MergeXR64Row_C                  AVX2
MergeXRGB16To8Row_C             AVX2
MergeXRGBRow_C                  SSE2+AVX2                       LSX+LASX
MirrorRow_16_C                  SSSE3+AVX2+AVX512BW             LSX+LASX
MirrorRow_C                     SSSE3+AVX2+AVX512BW             LSX+LASX
MirrorSplitUVRow_C              SSSE3+AVX2+AVX512BW             LSX+LASX
MirrorUVRow_C                   SSSE3+AVX2+AVX512BW             LSX+LASX
MultiplyRow_16_C                AVX2+AVX512BW                   LSX+LASX
NV12ToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
NV12ToRGB24Row_C                SSSE3+AVX2+AVX512VBMI
NV12ToRGB565Row_C               SSSE3+AVX2                      LSX+LASX
NV21ToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
NV21ToRGB24Row_C                SSSE3+AVX2+AVX512VBMI
NV21ToYUV24Row_C                SSSE3+AVX2+AVX512VBMI
P210ToAR30Row_C                 SSSE3+AVX2+AVX512BW
P210ToARGBRow_C                 SSSE3+AVX2+AVX512BW
P410ToAR30Row_C                 SSSE3+AVX2+AVX512BW
P410ToARGBRow_C                 SSSE3+AVX2+AVX512BW
RAWToARGBRow_C                  SSSE3+AVX2+AVX512BW             LSX+LASX
RAWToRGB24Row_C                 SSSE3+AVX2+AVX512BW+AVX512VBMI  LSX+LASX
RAWToRGBARow_C                  AVX2+AVX512VBMI                 LSX+LASX
RAWToUVRow                                                      LSX+LASX
RGB24MirrorRow_C                SSSE3+AVX2+AVX512VBMI           LSX+LASX
RGB24ToARGBRow_C                SSSE3+AVX2+AVX512BW             LSX+LASX
RGB24ToUVRow                                                    LSX+LASX
RGB565ToARGBRow_C               AVX2                            LSX+LASX
RGB565ToUVMatrixRow_C           AVX2
RGB565ToUVRow_C                 AVX2                            LSX+LASX
RGB565ToYMatrixRow_C            AVX2
RGB565ToYRow_C                  AVX2                            LSX+LASX
RGBAToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
RGBColorTableRow_C              AVX2
RGBToUV444MatrixRow_C           SSSE3+AVX2+AVX512BW
RGBToUVMatrixRow_C              SSSE3+AVX2+AVX512BW
RGBToYMatrixRow_C               SSSE3+AVX2+AVX512BW             LSX+LASX
SetRow_C                        ERMS+AVX2                       LSX+LASX
SobelRow_C                      AVX2                            LSX+LASX
SobelToPlaneRow_C               AVX2                            LSX+LASX
SobelXRow_C                     AVX2
SobelXYRow_C                    AVX2                            LSX+LASX
SobelYRow_C                     AVX2
SplitARGBRow_C                  SSE2+SSSE3+AVX2                 LSX+LASX
SplitRGBRow_C                   SSSE3+SSE41+AVX2
SplitUVRow_16_C                 AVX2                            LSX+LASX
SplitUVRow_C                    SSE2+AVX2+AVX512BW              LSX+LASX
SplitXRGBRow_C                  SSE2+SSSE3+AVX2                 LSX+LASX
SwapUVRow_C                     SSSE3+AVX2+AVX512BW             LSX+LASX
UYVYToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
UYVYToUV422Row_C                SSE2+AVX2+AVX512BW              LSX+LASX
UYVYToUVRow_C                   SSE2+AVX2+AVX512BW              LSX+LASX
UYVYToYRow_C                    SSE2+AVX2+AVX512BW              LSX+LASX
UnpackMT2T_C                    AVX2
YUY2ToARGBRow_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
YUY2ToNVUVRow_C                 SSE2+AVX2                       LSX+LASX
YUY2ToUV422Row_C                SSE2+AVX2+AVX512BW              LSX+LASX
YUY2ToUVRow_C                   SSE2+AVX2+AVX512BW              LSX+LASX
YUY2ToYRow_C                    SSE2+AVX2+AVX512BW              LSX+LASX
------------------------------------------------------------------------
Convert: 173 (100%)             171 (99%)                       116 (67%)
------------------------------------------------------------------------

Rotate SIMD ISA per *_C:
------------------------------------------------------------------------
C Function                      x86                             LoongArch
------------------------------------------------------------------------
TransposeUVWx16_C               AVX2+AVX512BW                   LSX+LASX
TransposeUVWx8_C                AVX2                            LSX+LASX
TransposeWx16_C                 AVX2+AVX512BW                   LSX+LASX
TransposeWx4_32_C               AVX2                            LSX+LASX
TransposeWx8_16_C               AVX2                            LSX+LASX
TransposeWx8_C                  AVX2                            LSX+LASX
TransposeWxH_32_C               AVX2
------------------------------------------------------------------------
Rotate: 7 (100%)                7 (100%)                        6 (86%)
------------------------------------------------------------------------

Scale SIMD ISA per *_C:
------------------------------------------------------------------------
C Function                      x86                             LoongArch
------------------------------------------------------------------------
FixedDiv1_C                     X86
FixedDiv_C                      X86
ScaleARGBCols64_C
ScaleARGBColsUp2_C              AVX2
ScaleARGBCols_C                 AVX2                            LSX+LASX
ScaleARGBFilterCols64_C
ScaleARGBFilterCols_C           AVX2                            LSX+LASX
ScaleARGBRowDown2Box_C          AVX2                            LSX+LASX
ScaleARGBRowDown2Linear_C       AVX2                            LSX+LASX
ScaleARGBRowDown2_C             AVX2                            LSX+LASX
ScaleARGBRowDownEvenBox_C       AVX2                            LSX+LASX
ScaleARGBRowDownEven_C          AVX2                            LSX+LASX
ScaleAddCols0_C
ScaleAddCols1_16_C
ScaleAddCols1_C                 AVX512BW
ScaleAddCols2_16_C
ScaleAddCols2_C                 AVX512BW
ScaleAddRow_16_C
ScaleAddRow_C                   SSE2+AVX2+AVX512BW              LSX+LASX
ScaleColsUp2_16_C
ScaleColsUp2_C                  AVX2
ScaleCols_16_C
ScaleCols_C
ScaleFilterCols64_16_C
ScaleFilterCols64_C
ScaleFilterCols_16_C
ScaleFilterCols_C               AVX2                            LSX+LASX
ScaleMaxSamples_C               AVX2                            LSX+LASX
ScaleRowDown2Box_16_C           AVX2
ScaleRowDown2Box_C              SSSE3+AVX2+AVX512BW             LSX+LASX
ScaleRowDown2Box_Odd_C          SSSE3+AVX2+AVX512BW
ScaleRowDown2Linear_16_C        AVX2
ScaleRowDown2Linear_C           SSSE3+AVX2+AVX512BW             LSX+LASX
ScaleRowDown2_16_C              AVX2
ScaleRowDown2_C                 SSSE3+AVX2+AVX512BW             LSX+LASX
ScaleRowDown34_0_Box_16_C
ScaleRowDown34_0_Box_C          AVX2                            LSX+LASX
ScaleRowDown34_16_C
ScaleRowDown34_1_Box_16_C
ScaleRowDown34_1_Box_C          AVX2                            LSX+LASX
ScaleRowDown34_C                AVX2                            LSX+LASX
ScaleRowDown38_16_C
ScaleRowDown38_2_Box_16_C
ScaleRowDown38_2_Box_C          AVX2                            LSX+LASX
ScaleRowDown38_3_Box_16_C
ScaleRowDown38_3_Box_C          AVX2                            LSX+LASX
ScaleRowDown38_C                AVX2                            LSX+LASX
ScaleRowDown4Box_16_C
ScaleRowDown4Box_C              SSSE3+AVX2                      LSX+LASX
ScaleRowDown4_16_C
ScaleRowDown4_C                 SSSE3+AVX2                      LSX+LASX
ScaleRowUp2_Bilinear_16_Any_C   SSE2+AVX2
ScaleRowUp2_Bilinear_16_C       SSE2+AVX2
ScaleRowUp2_Bilinear_Any_C      SSE2+SSSE3+AVX2
ScaleRowUp2_Bilinear_C          SSE2+SSSE3+AVX2
ScaleRowUp2_Linear_16_Any_C     SSE2+AVX2
ScaleRowUp2_Linear_16_C         SSE2+AVX2
ScaleRowUp2_Linear_Any_C        SSE2+SSSE3+AVX2
ScaleRowUp2_Linear_C            SSE2+SSSE3+AVX2
ScaleSamples_C                  AVX2                            LSX+LASX
ScaleSumSamples_C               AVX2                            LSX+LASX
ScaleUVAddCols1_16_C
ScaleUVAddCols1_C
ScaleUVAddCols2_16_C
ScaleUVAddCols2_C
ScaleUVAddCols3_16_C
ScaleUVAddCols3_C               AVX2+AVX512VBMI                 LSX+LASX
ScaleUVCols64_16_C
ScaleUVCols64_C
ScaleUVColsUp2_16_C
ScaleUVColsUp2_C
ScaleUVCols_16_C
ScaleUVCols_C
ScaleUVFilterCols64_16_C
ScaleUVFilterCols64_C
ScaleUVFilterCols_16_C
ScaleUVFilterCols_C
ScaleUVRowDown2Box_16_C
ScaleUVRowDown2Box_C            AVX2
ScaleUVRowDown2Linear_16_C
ScaleUVRowDown2Linear_C         AVX2
ScaleUVRowDown2_16_C
ScaleUVRowDown2_C               AVX2
ScaleUVRowDownEvenBox_16_C
ScaleUVRowDownEvenBox_C
ScaleUVRowDownEven_16_C
ScaleUVRowDownEven_C            AVX2
ScaleUVRowUp2_Bilinear_16_Any_C SSE41+AVX2
ScaleUVRowUp2_Bilinear_16_C     SSE41+AVX2
ScaleUVRowUp2_Bilinear_Any_C    SSSE3+AVX2
ScaleUVRowUp2_Bilinear_C        SSSE3+AVX2
ScaleUVRowUp2_Linear_16_Any_C   SSE41+AVX2
ScaleUVRowUp2_Linear_16_C       SSE41+AVX2
ScaleUVRowUp2_Linear_Any_C      SSSE3+AVX2
ScaleUVRowUp2_Linear_C          SSSE3+AVX2
------------------------------------------------------------------------
Scale: 95 (100%)                54 (57%)                        24 (25%)
------------------------------------------------------------------------

Bug: 42280942
Change-Id: I663f277db5e8a6a73319df7e3153f9f78a147a7a
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8718861
Reviewed-by: richard winterton <rrwinterton@gmail.com>
Commit-Queue: Frank Barchard <fbarchard@google.com>
2026-11-04 11:55:35 -08:00
build_overrides [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
docs [libyuv] Implement 8, 16, and 32-bit transpose using x86 ACEv1 2026-11-02 10:20:25 -08:00
include [libyuv] Add LoongArch LASX parity, cpucfg CPUID, and 38 convert rows 2026-11-04 11:55:35 -08:00
infra/config Use default xcode version in libyuv 2025-11-24 07:54:14 -08:00
riscv_script [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
source [libyuv] Add LoongArch LASX parity, cpucfg CPUID, and 38 convert rows 2026-11-04 11:55:35 -08:00
tools_libyuv Remove libyuv dependency on base/ 2025-01-08 09:04:21 -08:00
unit_test [libyuv] Add LoongArch LASX parity, cpucfg CPUID, and 38 convert rows 2026-11-04 11:55:35 -08:00
util [libyuv] Implement 8, 16, and 32-bit transpose using x86 ACEv1 2026-11-02 10:20:25 -08:00
.clang-format clang-format libyuv 2016-11-07 17:37:23 -08:00
.gitignore DetilePlane and unittest for NEON 2022-01-31 20:05:55 +00:00
.gn [libyuv] Fix x86 SIMD OOB, math, alignment, MSan & GCC bugs 2026-10-30 14:51:16 -07:00
Android.bp [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
Android.mk [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
AUTHORS Fix same-width vertical point upsampling 2026-08-24 19:28:50 -07:00
BUILD.bazel [libyuv] Add WASM SIMD128 and Relaxed SIMD for RAWToRGB24Row 2026-10-05 17:45:41 -07:00
BUILD.gn [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
CM_linux_packages.cmake Use grep extended regex for version 2024-11-13 02:11:17 +00:00
CMakeLists.txt [libyuv] Add LoongArch LASX parity, cpucfg CPUID, and 38 convert rows 2026-11-04 11:55:35 -08:00
codereview.settings [infra] remove no longer supported git cl upload setting. 2021-04-28 12:47:52 +00:00
DEPS [build] Use hermetic python3 for script_executable in .gn 2026-09-28 06:02:39 -07:00
DIR_METADATA Move metadata in OWNERS files to DIR_METADATA files 2021-02-09 19:34:43 +00:00
download_vs_toolchain.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
GEMINI.md [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
libyuv.bzl [libyuv] Simplify RVV configuration in BUILD.bazel and libyuv.bzl 2026-09-08 17:50:17 -07:00
libyuv.gni [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
libyuv.gyp Stop setting --dynamic-linker for target_os="android" 2026-05-27 04:34:07 -07:00
libyuv.gypi [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
LICENSE Update Copyright notice to follow new chromium conventions. 2012-08-08 19:04:24 +00:00
linux.mk [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
OWNERS Remove magjed from OWNERS 2026-08-24 10:43:21 -07:00
PATENTS LibYuv: Adding PATENT and LICENSE files 2011-10-25 16:15:49 +00:00
PRESUBMIT.py Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
public.mk use unix line endings 2018-06-20 23:19:59 +00:00
pylintrc Update pylintrc to a pep-8 like style 2024-12-18 05:38:56 -08:00
README.chromium [libyuv] Consolidate LoongArch LSX and LASX inline asm into *_la.cc 2026-11-03 13:03:56 -08:00
README.md Update README.md and environment_variables.md for Arm 2024-09-20 00:29:33 +00:00
vpython.toml [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
vpython.toml.uv.lock [vpython] Migrate .vpython3 to vpython.toml 2026-09-18 00:28:26 -07:00
winarm.mk NV12 Copy, include scale_uv.h 2020-12-08 18:54:16 +00:00
WORKSPACE.bazel Add Bazel build support 2026-04-15 18:20:26 -07:00

libyuv is an open source project that includes YUV scaling and conversion functionality.

  • Scale YUV to prepare content for compression, with point, bilinear or box filter.
  • Convert to YUV from webcam formats for compression.
  • Convert to RGB formats for rendering/effects.
  • Rotate by 90/180/270 degrees to adjust for mobile devices in portrait mode.
  • Optimized for SSSE3/AVX2 on x86/x64.
  • Optimized for Neon/SVE2/SME on Arm.
  • Optimized for MSA on Mips.
  • Optimized for RVV on RISC-V.

Development

See Getting started for instructions on how to get started developing.

You can also browse the docs directory for more documentation.