Frank Barchard dcbc5f9f2b [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD ... Refactor CalcFrameSsim to decompose overlapping 8x8 SSIM windows (stepped by 4 pixels horizontally and vertically) into non-overlapping 4x4 pixel tiles across a 2-row rotating buffer (row0, row1), reducing memory reads and pixel accumulation work by 4x: - Ssim4x4Row_* computes 4 uint32_t statistics {sum_a, sum_b, sum_sq_ab, sum_axb} per 4x4 pixel tile across a 4-row strip (also sized to fit future 10-bit/12-bit formats like I010 without uint32_t overflow). - SsimWindowRow_C combines top and bottom 4x4 tile strips across adjacent horizontal pairs and returns the exact double SSIM sum, producing bit-identical results to Ssim8x8_C. - CalcFrameSsim rotates row0 and row1 (with thread-local buffers and continuity tracking under _OPENMP) and falls back to Ssim8x8_C only if buffer allocation fails. - Implement Ssim4x4Row across all SIMD architectures: - x86/x64: Ssim4x4Row_SSE2, Ssim4x4Row_AVX2, and Ssim4x4Row_AVX512BW (with k-masked tail handling for 4..60 pixels) in both compare_gcc.cc and compare_win.cc. - ARM: Ssim4x4Row_NEON (compare_neon.cc, compare_neon64.cc), Ssim4x4Row_NEON_DotProd (compare_neon64.cc), Ssim4x4Row_SVE2 (row_sve.h, row_sve.cc), and Ssim4x4Row_SME (row_sme.cc). - RISC-V: Ssim4x4Row_RVV (row_rvv.cc). - LoongArch: Ssim4x4Row_LSX (row_lsx.cc) and Ssim4x4Row_LASX (row_lasx.cc). - WebAssembly: Ssim4x4Row_WASMSIMD (compare_wasm.cc). - Enable BenchmarkSsim_Opt and add BenchmarkSsim_Unaligned and TestSsimAnyWidth in unit_test/compare_test.cc. R=rrwinterton@gmail.com Bug: None Test: out/Release/libyuv_unittest --gtest_filter=*Ssim* Change-Id: Ibb95ae74424ecdda073ab7ab10ab1cf610b121b6		2026-10-15 15:33:21 -07:00
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libyuv	[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD	2026-10-15 15:33:21 -07:00
libyuv.h	libyuv.h: Add scale_rgb.h and remove scale_row.h	2026-08-26 19:06:22 -07:00