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https://chromium.googlesource.com/libyuv/libyuv
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Implement RAWToRGB24Row_WASMSIMD and RAWToRGB24Row_Any_WASMSIMD in source/row_wasm.cc for RGB24ToRAW and RAWToRGB24 conversions: - Process 16 pixels (48 bytes) per loop iteration using three 128-bit loads, three byte-wise shuffles, and four 2-way blends. - Use wasm_i8x16_relaxed_swizzle when __wasm_relaxed_simd__ is enabled (compiling to a single vpshufb on x86 without bounds-checking overhead) and fall back to wasm_i8x16_swizzle for baseline SIMD128. - Add kCpuHasWASM (0x100) and kCpuHasWASMSIMD (0x101) CPU feature flags and enable -msimd128 in BUILD.bazel, BUILD.gn, and CMakeLists.txt for WebAssembly targets. Performance (RAWToRGB24_Opt, 1280x720, V8 d8): CPU WASM C SIMD128 Relaxed SIMD Spd Rlx Spd ------------------------------------------------------------------- AMD Zen 4 595.0 us 137.0 us 84.0 us 4.34x 7.08x AMD Zen 3 708.0 us 148.0 us 107.0 us 4.78x 6.62x AMD Zen 5 375.0 us 107.0 us 67.0 us 3.50x 5.60x ARM Neoverse-V2 638.0 us 118.0 us 116.0 us 5.41x 5.50x ARM Neoverse-N1 1046.0 us 294.0 us 294.0 us 3.56x 3.56x Intel Ice Lake 707.0 us 209.0 us 220.0 us 3.38x 3.21x Intel Haswell 1110.0 us 344.0 us 360.0 us 3.23x 3.08x Intel Emerald Rapids 519.0 us 207.0 us 208.0 us 2.51x 2.50x Intel Sapphire Rapids 551.0 us 220.0 us 255.0 us 2.50x 2.16x ARM Cortex-A53 14440.0 us 8660.0us 6920.0us 1.67x 2.09x Intel Granite Rapids 453.0 us 225.0 us 221.0 us 2.01x 2.05x Bug: 42271072 Test: libyuv_test --gunit_filter=*RAWToRGB24*:*RGB24ToRAW*:*Cpu* Change-Id: Id902668263a2ab70aa300eeeea18851490c917b5 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8515581 Reviewed-by: richard winterton <rrwinterton@gmail.com> Commit-Queue: Frank Barchard <fbarchard@google.com>
259 lines
8.2 KiB
C
259 lines
8.2 KiB
C
/*
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* Copyright 2012 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#ifdef __linux__
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#include <ctype.h>
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#include <setjmp.h>
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#include <signal.h>
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#include <sys/utsname.h>
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#endif
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#include "libyuv/cpu_id.h"
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#ifdef __cplusplus
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using namespace libyuv;
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#endif
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#ifdef __linux__
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static void KernelVersion(int* version) {
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struct utsname buffer;
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int i = 0;
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version[0] = version[1] = 0;
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if (uname(&buffer) == 0) {
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char* v = buffer.release;
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for (i = 0; *v && i < 2; ++v) {
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if (isdigit(*v)) {
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version[i++] = (int)strtol(v, &v, 10);
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}
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}
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}
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}
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#endif
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#if defined(__linux__) && (defined(__i386__) || defined(__x86_64__))
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static sigjmp_buf vdpphps_jmpbuf;
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static void vdpphps_sigill_handler(int sig) {
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(void)sig;
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siglongjmp(vdpphps_jmpbuf, 1);
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}
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#endif
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int main(int argc, const char* argv[]) {
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(void)argc;
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(void)argv;
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#if defined(__linux__)
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{
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int kernelversion[2];
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KernelVersion(kernelversion);
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printf("Kernel Version %d.%d\n", kernelversion[0], kernelversion[1]);
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}
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#endif // defined(__linux__)
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#if defined(__arm__) || defined(__aarch64__)
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int has_arm = TestCpuFlag(kCpuHasARM);
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if (has_arm) {
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int has_neon = TestCpuFlag(kCpuHasNEON);
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int has_neon_dotprod = TestCpuFlag(kCpuHasNeonDotProd);
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int has_neon_i8mm = TestCpuFlag(kCpuHasNeonI8MM);
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int has_sve = TestCpuFlag(kCpuHasSVE);
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int has_sve2 = TestCpuFlag(kCpuHasSVE2);
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int has_sve_f32mm = TestCpuFlag(kCpuHasSVEF32MM);
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int has_sme = TestCpuFlag(kCpuHasSME);
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int has_sme2 = TestCpuFlag(kCpuHasSME2);
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printf("Has Arm 0x%x\n", has_arm);
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printf("Has Neon 0x%x\n", has_neon);
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printf("Has Neon DotProd 0x%x\n", has_neon_dotprod);
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printf("Has Neon I8MM 0x%x\n", has_neon_i8mm);
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printf("Has SVE 0x%x\n", has_sve);
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printf("Has SVE2 0x%x\n", has_sve2);
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printf("Has SVE F32MM 0x%x\n", has_sve_f32mm);
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printf("Has SME 0x%x\n", has_sme);
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printf("Has SME2 0x%x\n", has_sme2);
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#if __aarch64__
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// Read and print the SVE and SME vector lengths.
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if (has_sve) {
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int sve_vl;
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__asm__(
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".inst 0x04bf5020 \n" // rdvl x0, #1
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"mov %w[sve_vl], w0 \n"
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: [sve_vl] "=r"(sve_vl) // %[sve_vl]
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:
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: "x0");
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printf("SVE vector length: %d bytes\n", sve_vl);
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}
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if (has_sme) {
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int sme_vl;
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__asm__(
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".inst 0x04bf5820 \n" // rdsvl x0, #1
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"mov %w[sme_vl], w0 \n"
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: [sme_vl] "=r"(sme_vl) // %[sme_vl]
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:
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: "x0");
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printf("SME vector length: %d bytes\n", sme_vl);
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}
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#endif // defined(__aarch64__)
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}
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#endif // if defined(__arm__) || defined(__aarch64__)
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#if defined(__riscv)
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int has_riscv = TestCpuFlag(kCpuHasRISCV);
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if (has_riscv) {
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int has_rvv = TestCpuFlag(kCpuHasRVV);
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printf("Has RISCV 0x%x\n", has_riscv);
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printf("Has RVV 0x%x\n", has_rvv);
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// Read and print the RVV vector length.
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if (has_rvv) {
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register uint32_t vlenb __asm__("t0");
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__asm__(".word 0xC22022F3" /* CSRR t0, vlenb */ : "=r"(vlenb));
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printf("RVV vector length: %d bytes\n", vlenb);
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}
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}
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#endif // defined(__riscv)
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#if defined(__loongarch__)
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int has_loongarch = TestCpuFlag(kCpuHasLOONGARCH);
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if (has_loongarch) {
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int has_lsx = TestCpuFlag(kCpuHasLSX);
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int has_lasx = TestCpuFlag(kCpuHasLASX);
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printf("Has LOONGARCH 0x%x\n", has_loongarch);
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printf("Has LSX 0x%x\n", has_lsx);
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printf("Has LASX 0x%x\n", has_lasx);
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}
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#endif // defined(__loongarch__)
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#if defined(__wasm__)
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int has_wasm = TestCpuFlag(kCpuHasWASM);
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if (has_wasm) {
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int has_wasm_simd = TestCpuFlag(kCpuHasWASMSIMD);
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printf("Has WASM 0x%x\n", has_wasm);
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printf("Has WASM SIMD 0x%x\n", has_wasm_simd);
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}
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#endif // defined(__wasm__)
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || \
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defined(_M_X64)
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int has_x86 = TestCpuFlag(kCpuHasX86);
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if (has_x86) {
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int family, model, cpu_info[4];
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// Vendor ID:
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// AuthenticAMD AMD processor
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// CentaurHauls Centaur processor
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// CyrixInstead Cyrix processor
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// GenuineIntel Intel processor
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// GenuineTMx86 Transmeta processor
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// Geode by NSC National Semiconductor processor
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// NexGenDriven NexGen processor
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// RiseRiseRise Rise Technology processor
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// SiS SiS SiS SiS processor
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// UMC UMC UMC UMC processor
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CpuId(0, 0, &cpu_info[0]);
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cpu_info[0] = cpu_info[1]; // Reorder output
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cpu_info[1] = cpu_info[3];
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cpu_info[3] = 0;
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printf("Cpu Vendor: %s\n", (char*)(&cpu_info[0]));
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// CPU Family and Model
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// 3:0 - Stepping
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// 7:4 - Model
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// 11:8 - Family
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// 13:12 - Processor Type
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// 19:16 - Extended Model
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// 27:20 - Extended Family
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CpuId(1, 0, &cpu_info[0]);
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family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
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model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
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printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family, model,
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model);
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int has_sse2 = TestCpuFlag(kCpuHasSSE2);
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int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
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int has_sse41 = TestCpuFlag(kCpuHasSSE41);
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int has_sse42 = TestCpuFlag(kCpuHasSSE42);
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int has_avx = TestCpuFlag(kCpuHasAVX);
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int has_avx2 = TestCpuFlag(kCpuHasAVX2);
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int has_erms = TestCpuFlag(kCpuHasERMS);
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int has_fsmr = TestCpuFlag(kCpuHasFSMR);
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int has_fma3 = TestCpuFlag(kCpuHasFMA3);
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int has_f16c = TestCpuFlag(kCpuHasF16C);
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int has_avx512bw = TestCpuFlag(kCpuHasAVX512BW);
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int has_avx512vl = TestCpuFlag(kCpuHasAVX512VL);
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int has_avx512vnni = TestCpuFlag(kCpuHasAVX512VNNI);
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int has_avx512vbmi = TestCpuFlag(kCpuHasAVX512VBMI);
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int has_avx512vbmi2 = TestCpuFlag(kCpuHasAVX512VBMI2);
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int has_avx512vbitalg = TestCpuFlag(kCpuHasAVX512VBITALG);
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int has_avx10 = TestCpuFlag(kCpuHasAVX10);
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int has_avx10_2 = TestCpuFlag(kCpuHasAVX10_2);
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int has_avxvnni = TestCpuFlag(kCpuHasAVXVNNI);
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int has_avxvnniint8 = TestCpuFlag(kCpuHasAVXVNNIINT8);
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int has_amxint8 = TestCpuFlag(kCpuHasAMXINT8);
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int has_avx512bmm = TestCpuFlag(kCpuHasAVX512BMM);
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printf("Has X86 0x%x\n", has_x86);
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printf("Has SSE2 0x%x\n", has_sse2);
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printf("Has SSSE3 0x%x\n", has_ssse3);
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printf("Has SSE4.1 0x%x\n", has_sse41);
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printf("Has SSE4.2 0x%x\n", has_sse42);
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printf("Has AVX 0x%x\n", has_avx);
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printf("Has AVX2 0x%x\n", has_avx2);
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printf("Has ERMS 0x%x\n", has_erms);
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printf("Has FSMR 0x%x\n", has_fsmr);
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printf("Has FMA3 0x%x\n", has_fma3);
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printf("Has F16C 0x%x\n", has_f16c);
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printf("Has AVX512BW 0x%x\n", has_avx512bw);
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printf("Has AVX512VL 0x%x\n", has_avx512vl);
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printf("Has AVX512VNNI 0x%x\n", has_avx512vnni);
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printf("Has AVX512VBMI 0x%x\n", has_avx512vbmi);
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printf("Has AVX512VBMI2 0x%x\n", has_avx512vbmi2);
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printf("Has AVX512VBITALG 0x%x\n", has_avx512vbitalg);
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printf("Has AVX10 0x%x\n", has_avx10);
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printf("Has AVX10_2 0x%x\n", has_avx10_2);
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printf("HAS AVXVNNI 0x%x\n", has_avxvnni);
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printf("Has AVXVNNIINT8 0x%x\n", has_avxvnniint8);
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printf("Has AMXINT8 0x%x\n", has_amxint8);
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printf("Has AVX512BMM 0x%x\n", has_avx512bmm);
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#ifdef __linux__
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// Test VDPPHPS instruction
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{
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struct sigaction act, oldact;
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memset(&act, 0, sizeof(act));
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act.sa_handler = vdpphps_sigill_handler;
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sigaction(SIGILL, &act, &oldact);
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printf("Testing VDPPHPS instruction... ");
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fflush(stdout);
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if (sigsetjmp(vdpphps_jmpbuf, 1) == 0) {
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// VDPPHPS xmm0, xmm0, xmm0
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__asm__ volatile(".byte 0x62, 0xf2, 0x7c, 0x08, 0x52, 0xc0"
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:
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:
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: "xmm0");
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printf("Works!\n");
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} else {
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printf("Crashed (SIGILL)!\n");
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}
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sigaction(SIGILL, &oldact, NULL);
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}
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#endif
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}
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#endif // defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) ||
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// defined(_M_X64)
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return 0;
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}
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