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compare_common.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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compare_gcc.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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compare_hvx.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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compare_neon64.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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compare_neon.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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compare_wasm.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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compare_win.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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compare.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert_argb.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert_from_argb.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert_from.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert_jpeg.cc
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[libyuv] Keep LIBYUV_API in basic_types.h and remove legacy types and bool macros
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2026-08-28 08:32:19 -07:00 |
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convert_to_argb.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert_to_i420.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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convert.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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cpu_id.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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mjpeg_decoder.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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mjpeg_validate.cc
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[libyuv] Keep LIBYUV_API in basic_types.h and remove legacy types and bool macros
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2026-08-28 08:32:19 -07:00 |
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planar_functions.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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rotate_any.cc
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[libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm
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2026-10-16 17:25:23 -07:00 |
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rotate_argb.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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rotate_common.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_gcc.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_hvx.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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rotate_lasx.cc
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[libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm
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2026-10-16 17:25:23 -07:00 |
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rotate_lsx.cc
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[libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm
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2026-10-16 17:25:23 -07:00 |
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rotate_neon64.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_neon.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_rvv.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_sme.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_sve.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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rotate_wasm.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate_win.cc
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[libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes
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2026-10-12 10:57:34 -07:00 |
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rotate.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_any.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_common.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_gcc.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_hvx.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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row_lasx.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_lsx.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_neon64.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_neon.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_rvv.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_sme.cc
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[libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD
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2026-10-15 23:22:58 -07:00 |
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row_sve.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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row_wasm.cc
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[libyuv] AVX512, NEON, WASM and RVV alpha copy and mirror rows
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2026-10-07 12:44:53 -07:00 |
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row_win.cc
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Add 25 native k-masked AVX-512 row kernels
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2026-10-12 18:14:41 -07:00 |
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scale_any.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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scale_argb.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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scale_common.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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scale_gcc.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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scale_hvx.cc
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[libyuv] Add Qualcomm Hexagon HVX SIMD support
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2026-10-19 14:16:18 -07:00 |
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scale_lsx.cc
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[libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm
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2026-10-16 17:25:23 -07:00 |
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scale_neon64.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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scale_neon.cc
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Fix missing inline asm register clobbers
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2026-10-08 14:44:23 -07:00 |
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scale_rgb.cc
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Fix Coverity Control flow issues (DEADCODE)
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2026-07-01 10:39:22 -07:00 |
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scale_rvv.cc
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Fix missing inline asm register clobbers
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2026-10-08 14:44:23 -07:00 |
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scale_sme.cc
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Fix missing inline asm register clobbers
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2026-10-08 14:44:23 -07:00 |
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scale_uv.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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scale_wasm.cc
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[libyuv] Add WASM SIMD128 compare, rotate, scale and row functions
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2026-10-06 19:05:05 -07:00 |
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scale_win.cc
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BGRAToI420 use BgraConstants for a direct conversion using AVX512BW
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2026-06-08 12:21:47 -07:00 |
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scale.cc
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/tmp/commit_msg_ps5.txt
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2026-10-19 16:07:23 -07:00 |
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test.sh
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Optimze ABGRToI420 for AVX2
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2020-06-04 18:24:45 +00:00 |
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video_common.cc
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Lint cleanup after C99 change CL
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2018-01-24 19:16:03 +00:00 |
