mirror of
https://chromium.googlesource.com/libyuv/libyuv
synced 2025-12-06 16:56:55 +08:00
- Renumber cpuid bits to use low byte to ID the type of CPU and upper 24 bits for features Intel CPUs starting at Icelake support FSMR adl:Has FSMR 0x8000 arl:Has FSMR 0x0 bdw:Has FSMR 0x0 clx:Has FSMR 0x0 cnl:Has FSMR 0x0 cpx:Has FSMR 0x0 emr:Has FSMR 0x8000 glm:Has FSMR 0x0 glp:Has FSMR 0x0 gnr:Has FSMR 0x8000 gnr256:Has FSMR 0x8000 hsw:Has FSMR 0x0 icl:Has FSMR 0x8000 icx:Has FSMR 0x8000 ivb:Has FSMR 0x0 knl:Has FSMR 0x0 knm:Has FSMR 0x0 lnl:Has FSMR 0x8000 mrm:Has FSMR 0x0 mtl:Has FSMR 0x8000 nhm:Has FSMR 0x0 pnr:Has FSMR 0x0 rpl:Has FSMR 0x8000 skl:Has FSMR 0x0 skx:Has FSMR 0x0 slm:Has FSMR 0x0 slt:Has FSMR 0x0 snb:Has FSMR 0x0 snr:Has FSMR 0x0 spr:Has FSMR 0x8000 srf:Has FSMR 0x0 tgl:Has FSMR 0x8000 tnt:Has FSMR 0x0 wsm:Has FSMR 0x0 Intel CPUs starting at Ivybridge support ERMS adl:Has ERMS 0x4000 arl:Has ERMS 0x4000 bdw:Has ERMS 0x4000 clx:Has ERMS 0x4000 cnl:Has ERMS 0x4000 cpx:Has ERMS 0x4000 emr:Has ERMS 0x4000 glm:Has ERMS 0x4000 glp:Has ERMS 0x4000 gnr:Has ERMS 0x4000 gnr256:Has ERMS 0x4000 hsw:Has ERMS 0x4000 icl:Has ERMS 0x4000 icx:Has ERMS 0x4000 ivb:Has ERMS 0x4000 knl:Has ERMS 0x4000 knm:Has ERMS 0x4000 lnl:Has ERMS 0x4000 mrm:Has ERMS 0x0 mtl:Has ERMS 0x4000 nhm:Has ERMS 0x0 pnr:Has ERMS 0x0 rpl:Has ERMS 0x4000 skl:Has ERMS 0x4000 skx:Has ERMS 0x4000 slm:Has ERMS 0x4000 slt:Has ERMS 0x0 snb:Has ERMS 0x0 snr:Has ERMS 0x4000 spr:Has ERMS 0x4000 srf:Has ERMS 0x4000 tgl:Has ERMS 0x4000 tnt:Has ERMS 0x4000 wsm:Has ERMS 0x0 Change-Id: I18e5a3905f2691ab66d4d0cb6f668c0a0ff72d37 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6027541 Reviewed-by: richard winterton <rrwinterton@gmail.com>
293 lines
13 KiB
C++
293 lines
13 KiB
C++
/*
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* Copyright 2024 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "libyuv/scale_row.h"
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#ifdef __cplusplus
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namespace libyuv {
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extern "C" {
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#endif
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#if !defined(LIBYUV_DISABLE_SME) && defined(CLANG_HAS_SME) && \
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defined(__aarch64__)
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__arm_locally_streaming void ScaleRowDown2_SME(const uint8_t* src_ptr,
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ptrdiff_t src_stride,
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uint8_t* dst,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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(void)src_stride;
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int vl;
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asm volatile(
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"cntb %x[vl] \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"1: \n"
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"ptrue p0.b \n"
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"ld2b {z0.b, z1.b}, p0/z, [%[src_ptr]] \n"
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"incb %[src_ptr], all, mul #2 \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"st1b {z1.b}, p0, [%[dst_ptr]] \n"
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"incb %[dst_ptr] \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.b, wzr, %w[dst_width] \n"
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"ld2b {z0.b, z1.b}, p0/z, [%[src_ptr]] \n"
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"st1b {z1.b}, p0, [%[dst_ptr]] \n"
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"99: \n"
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: [src_ptr] "+r"(src_ptr), // %[src_ptr]
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[dst_ptr] "+r"(dst), // %[dst_ptr]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "memory", "cc", "z0", "z1", "p0");
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}
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__arm_locally_streaming void ScaleRowDown2Linear_SME(const uint8_t* src_ptr,
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ptrdiff_t src_stride,
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uint8_t* dst,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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(void)src_stride;
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int vl;
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asm volatile(
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"cntb %x[vl] \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"1: \n"
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"ptrue p0.b \n"
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"ld2b {z0.b, z1.b}, p0/z, [%[src_ptr]] \n"
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"incb %[src_ptr], all, mul #2 \n"
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"urhadd z0.b, p0/m, z0.b, z1.b \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"st1b {z0.b}, p0, [%[dst_ptr]] \n"
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"incb %[dst_ptr] \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.b, wzr, %w[dst_width] \n"
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"ld2b {z0.b, z1.b}, p0/z, [%[src_ptr]] \n"
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"urhadd z0.b, p0/m, z0.b, z1.b \n"
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"st1b {z0.b}, p0, [%[dst_ptr]] \n"
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"99: \n"
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: [src_ptr] "+r"(src_ptr), // %[src_ptr]
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[dst_ptr] "+r"(dst), // %[dst_ptr]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "memory", "cc", "z0", "z1", "p0");
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}
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#define SCALEROWDOWN2BOX_SVE \
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"ld2b {z0.b, z1.b}, p0/z, [%[src_ptr]] \n" \
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"ld2b {z2.b, z3.b}, p0/z, [%[src2_ptr]] \n" \
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"incb %[src_ptr], all, mul #2 \n" \
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"incb %[src2_ptr], all, mul #2 \n" \
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"uaddlb z4.h, z0.b, z1.b \n" \
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"uaddlt z5.h, z0.b, z1.b \n" \
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"uaddlb z6.h, z2.b, z3.b \n" \
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"uaddlt z7.h, z2.b, z3.b \n" \
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"add z4.h, z4.h, z6.h \n" \
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"add z5.h, z5.h, z7.h \n" \
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"rshrnb z0.b, z4.h, #2 \n" \
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"rshrnt z0.b, z5.h, #2 \n" \
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"subs %w[dst_width], %w[dst_width], %w[vl] \n" \
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"st1b {z0.b}, p0, [%[dst_ptr]] \n" \
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"incb %[dst_ptr] \n"
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__arm_locally_streaming void ScaleRowDown2Box_SME(const uint8_t* src_ptr,
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ptrdiff_t src_stride,
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uint8_t* dst,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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const uint8_t* src2_ptr = src_ptr + src_stride;
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int vl;
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asm volatile(
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"cntb %x[vl] \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"ptrue p0.b \n"
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"1: \n" //
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SCALEROWDOWN2BOX_SVE
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.b, wzr, %w[dst_width] \n" //
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SCALEROWDOWN2BOX_SVE
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"99: \n"
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: [src_ptr] "+r"(src_ptr), // %[src_ptr]
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[src2_ptr] "+r"(src2_ptr), // %[src2_ptr]
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[dst_ptr] "+r"(dst), // %[dst_ptr]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "memory", "cc", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "p0");
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}
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#undef SCALEROWDOWN2BOX_SVE
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__arm_locally_streaming void ScaleUVRowDown2_SME(const uint8_t* src_uv,
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ptrdiff_t src_stride,
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uint8_t* dst_uv,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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(void)src_stride;
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int vl;
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asm volatile(
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"cnth %x[vl] \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"1: \n"
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"ptrue p0.b \n"
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"ld2h {z0.h, z1.h}, p0/z, [%[src_uv]] \n"
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"incb %[src_uv], all, mul #2 \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"st1h {z1.h}, p0, [%[dst_uv]] \n"
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"incb %[dst_uv] \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.h, wzr, %w[dst_width] \n"
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"ld2h {z0.h, z1.h}, p0/z, [%[src_uv]] \n"
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"st1h {z1.h}, p0, [%[dst_uv]] \n"
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"99: \n"
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: [src_uv] "+r"(src_uv), // %[src_uv]
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[dst_uv] "+r"(dst_uv), // %[dst_uv]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "memory", "cc", "z0", "z1", "p0");
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}
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__arm_locally_streaming void ScaleUVRowDown2Linear_SME(const uint8_t* src_uv,
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ptrdiff_t src_stride,
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uint8_t* dst_uv,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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(void)src_stride;
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int vl;
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asm volatile(
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"cnth %x[vl] \n"
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"ptrue p1.b \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"ptrue p0.h \n"
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"1: \n"
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"ld2h {z0.h, z1.h}, p0/z, [%[src_uv]] \n"
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"incb %[src_uv], all, mul #2 \n"
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"urhadd z0.b, p1/m, z0.b, z1.b \n"
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"st1h {z0.h}, p0, [%[dst_uv]] \n"
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"incb %[dst_uv], all, mul #1 \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.h, wzr, %w[dst_width] \n"
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"ld2h {z0.h, z1.h}, p0/z, [%[src_uv]] \n"
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"urhadd z0.b, p1/m, z0.b, z1.b \n"
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"st1h {z0.h}, p0, [%[dst_uv]] \n"
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"99: \n"
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: [src_uv] "+r"(src_uv), // %[src_uv]
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[dst_uv] "+r"(dst_uv), // %[dst_uv]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "z0", "z1", "p0", "p1");
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}
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#define SCALEUVROWDOWN2BOX_SVE \
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"ld2h {z0.h, z1.h}, p0/z, [%[src_uv]] \n" \
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"ld2h {z2.h, z3.h}, p0/z, [%[src2_uv]] \n" \
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"incb %[src_uv], all, mul #2 \n" \
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"incb %[src2_uv], all, mul #2 \n" \
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"uaddlb z4.h, z0.b, z1.b \n" \
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"uaddlt z5.h, z0.b, z1.b \n" \
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"uaddlb z6.h, z2.b, z3.b \n" \
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"uaddlt z7.h, z2.b, z3.b \n" \
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"add z4.h, z4.h, z6.h \n" \
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"add z5.h, z5.h, z7.h \n" \
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"rshrnb z0.b, z4.h, #2 \n" \
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"rshrnt z0.b, z5.h, #2 \n" \
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"st1h {z0.h}, p0, [%[dst_uv]] \n" \
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"incb %[dst_uv], all, mul #1 \n"
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__arm_locally_streaming void ScaleUVRowDown2Box_SME(const uint8_t* src_uv,
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ptrdiff_t src_stride,
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uint8_t* dst_uv,
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int dst_width) {
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// Streaming-SVE only, no use of ZA tile.
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const uint8_t* src2_uv = src_uv + src_stride;
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int vl;
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asm volatile(
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"cnth %x[vl] \n"
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"ptrue p1.b \n"
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.lt 2f \n"
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"ptrue p0.h \n"
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"1: \n" //
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SCALEUVROWDOWN2BOX_SVE
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"subs %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[dst_width], %w[dst_width], %w[vl] \n"
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"b.eq 99f \n"
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"whilelt p0.h, wzr, %w[dst_width] \n" //
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SCALEUVROWDOWN2BOX_SVE
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"99: \n"
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: [src_uv] "+r"(src_uv), // %[src_uv]
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[src2_uv] "+r"(src2_uv), // %[src2_uv]
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[dst_uv] "+r"(dst_uv), // %[dst_uv]
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[dst_width] "+r"(dst_width), // %[dst_width]
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[vl] "=r"(vl) // %[vl]
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:
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: "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "p0", "p1");
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}
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#undef SCALEUVROWDOWN2BOX_SVE
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#endif // !defined(LIBYUV_DISABLE_SME) && defined(CLANG_HAS_SME) &&
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// defined(__aarch64__)
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#ifdef __cplusplus
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} // extern "C"
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} // namespace libyuv
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#endif
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