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https://chromium.googlesource.com/libyuv/libyuv
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[AArch64] Unroll SVE2 impls of NV{12,21}ToARGBRow
We can reuse most of the logic from the existing I422TORGB_SVE_2X macro
and simply amend the existing READNV_SVE macro to read twice as much
data.
Unrolling is primarily beneficial for little cores but also provides
some smaller benefits to larger cores as well.
| NV12ToARGBRow_SVE2 | NV21ToARGBRow_SVE2
Cortex-A510 | -48.0% | -47.9%
Cortex-A520 | -48.1% | -48.2%
Cortex-A715 | -20.4% | -20.4%
Cortex-A720 | -20.6% | -20.6%
Cortex-X2 | -7.1% | -7.3%
Cortex-X3 | -4.0% | -4.3%
Cortex-X4 | -14.1% | -14.3%
Cortex-X925 | -8.2% | -8.6%
Change-Id: I195005d23e743d7d46319220ad05ee89bb7385ae
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/6067148
Reviewed-by: Frank Barchard <fbarchard@chromium.org>
This commit is contained in:
George Steed
Frank Barchard
parent
03a935493d
commit
88a3472f52
@ -68,15 +68,15 @@ extern "C" {
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// We need a different predicate for the UV component to handle the tail.
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// If there is a single element remaining then we want to load one Y element
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// but two UV elements.
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#define READNV_SVE \
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"ld1b {z0.h}, p1/z, [%[src_y]] \n" /* Y0Y0 */ \
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"ld1b {z1.h}, p2/z, [%[src_uv]] \n" /* U0V0 or V0U0 */ \
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"inch %[src_y] \n" \
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"inch %[src_uv] \n" \
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#define READNV_SVE_2X \
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"ld1b {z0.b}, p1/z, [%[src_y]] \n" /* Y0Y0 */ \
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"ld1b {z2.b}, p2/z, [%[src_uv]] \n" /* U0V0 or V0U0 */ \
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"incb %[src_y] \n" \
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"incb %[src_uv] \n" \
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"prfm pldl1keep, [%[src_y], 448] \n" \
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"prfm pldl1keep, [%[src_uv], 256] \n" \
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"trn1 z0.b, z0.b, z0.b \n" /* YYYY */ \
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"tbl z1.b, {z1.b}, z22.b \n" /* UVUV */
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"trn2 z1.b, z0.b, z0.b \n" /* YYYY */ \
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"trn1 z0.b, z0.b, z0.b \n" /* YYYY */
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#define READI210_SVE \
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"ld1h {z3.h}, p1/z, [%[src_y]] \n" \
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@ -225,6 +225,27 @@ extern "C" {
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"uqsub z18.h, z18.h, z27.h \n" /* R0 */ \
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"uqsub z22.h, z22.h, z27.h \n" /* R1 */
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#define NVTORGB_SVE_2X(bt_u, bt_v) \
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"umulh z0.h, z24.h, z0.h \n" /* Y0 */ \
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"umulh z1.h, z24.h, z1.h \n" /* Y1 */ \
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"umull" #bt_u " z6.h, z30.b, z2.b \n" \
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"umull" #bt_u " z4.h, z28.b, z2.b \n" /* DB */ \
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"umull" #bt_v " z5.h, z29.b, z2.b \n" /* DR */ \
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"umlal" #bt_v " z6.h, z31.b, z2.b \n" /* DG */ \
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\
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"add z17.h, z0.h, z26.h \n" /* G0 */ \
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"add z21.h, z1.h, z26.h \n" /* G1 */ \
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"add z16.h, z0.h, z4.h \n" /* B0 */ \
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"add z20.h, z1.h, z4.h \n" /* B1 */ \
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"add z18.h, z0.h, z5.h \n" /* R0 */ \
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"add z22.h, z1.h, z5.h \n" /* R1 */ \
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"uqsub z17.h, z17.h, z6.h \n" /* G0 */ \
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"uqsub z21.h, z21.h, z6.h \n" /* G1 */ \
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"uqsub z16.h, z16.h, z25.h \n" /* B0 */ \
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"uqsub z20.h, z20.h, z25.h \n" /* B1 */ \
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"uqsub z18.h, z18.h, z27.h \n" /* R0 */ \
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"uqsub z22.h, z22.h, z27.h \n" /* R1 */
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#define I400TORGB_SVE \
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"umulh z18.h, z24.h, z0.h \n" /* Y */ \
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"movprfx z16, z18 \n" \
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@ -784,33 +805,36 @@ void I422AlphaToARGBRow_SVE2(const uint8_t* src_y,
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: "cc", "memory", YUVTORGB_SVE_REGS);
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}
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static inline void NVToARGBRow_SVE2(const uint8_t* src_y,
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void NV12ToARGBRow_SVE2(const uint8_t* src_y,
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const uint8_t* src_uv,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width,
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uint32_t nv_uv_start,
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uint32_t nv_uv_step) {
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int width) {
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uint32_t nv_u_start = 0xff00U;
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uint32_t nv_u_step = 0x0002U;
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uint32_t nv_v_start = 0xff01U;
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uint32_t nv_v_step = 0x0002U;
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uint64_t vl;
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asm("cnth %0" : "=r"(vl));
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asm("cntb %0" : "=r"(vl));
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int width_last_y = width & (vl - 1);
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int width_last_uv = width_last_y + (width_last_y & 1);
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asm volatile(
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"ptrue p0.b \n" //
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YUVTORGB_SVE_SETUP
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"index z22.s, %w[nv_uv_start], %w[nv_uv_step] \n"
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"dup z19.b, #255 \n" // A
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"index z7.h, %w[nv_u_start], %w[nv_u_step] \n"
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"index z23.h, %w[nv_v_start], %w[nv_v_step] \n"
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"subs %w[width], %w[width], %w[vl] \n"
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"b.lt 2f \n"
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// Run bulk of computation with an all-true predicate to avoid predicate
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// generation overhead.
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"ptrue p1.h \n"
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"ptrue p2.h \n"
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"ptrue p1.b \n"
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"ptrue p2.b \n"
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"1: \n" //
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READNV_SVE NVTORGB_SVE RGBTOARGB8_SVE
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READNV_SVE_2X NVTORGB_SVE_2X(b, t) RGBTOARGB8_SVE_2X
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"subs %w[width], %w[width], %w[vl] \n"
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"st2h {z16.h, z17.h}, p1, [%[dst_argb]] \n"
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"st4b {z16.b, z17.b, z18.b, z19.b}, p1, [%[dst_argb]] \n"
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"add %[dst_argb], %[dst_argb], %[vl], lsl #2 \n"
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"b.ge 1b \n"
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@ -819,11 +843,10 @@ static inline void NVToARGBRow_SVE2(const uint8_t* src_y,
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"b.eq 99f \n"
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// Calculate a predicate for the final iteration to deal with the tail.
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"3: \n"
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"whilelt p1.h, wzr, %w[width_last_y] \n"
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"whilelt p2.h, wzr, %w[width_last_uv] \n" //
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READNV_SVE NVTORGB_SVE RGBTOARGB8_SVE
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"st2h {z16.h, z17.h}, p1, [%[dst_argb]] \n"
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"whilelt p1.b, wzr, %w[width_last_y] \n"
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"whilelt p2.b, wzr, %w[width_last_uv] \n" //
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READNV_SVE_2X NVTORGB_SVE_2X(b, t) RGBTOARGB8_SVE_2X
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"st4b {z16.b, z17.b, z18.b, z19.b}, p1, [%[dst_argb]] \n"
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"99: \n"
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: [src_y] "+r"(src_y), // %[src_y]
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@ -833,33 +856,73 @@ static inline void NVToARGBRow_SVE2(const uint8_t* src_y,
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: [vl] "r"(vl), // %[vl]
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[kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[nv_uv_start] "r"(nv_uv_start), // %[nv_uv_start]
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[nv_uv_step] "r"(nv_uv_step), // %[nv_uv_step]
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[nv_u_start] "r"(nv_u_start), // %[nv_u_start]
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[nv_u_step] "r"(nv_u_step), // %[nv_u_step]
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[nv_v_start] "r"(nv_v_start), // %[nv_v_start]
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[nv_v_step] "r"(nv_v_step), // %[nv_v_step]
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[width_last_y] "r"(width_last_y), // %[width_last_y]
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[width_last_uv] "r"(width_last_uv) // %[width_last_uv]
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: "cc", "memory", YUVTORGB_SVE_REGS, "p2");
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}
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void NV12ToARGBRow_SVE2(const uint8_t* src_y,
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const uint8_t* src_uv,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width) {
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uint32_t nv_uv_start = 0x02000200U;
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uint32_t nv_uv_step = 0x04040404U;
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NVToARGBRow_SVE2(src_y, src_uv, dst_argb, yuvconstants, width, nv_uv_start,
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nv_uv_step);
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}
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void NV21ToARGBRow_SVE2(const uint8_t* src_y,
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const uint8_t* src_vu,
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uint8_t* dst_argb,
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const struct YuvConstants* yuvconstants,
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int width) {
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uint32_t nv_uv_start = 0x00020002U;
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uint32_t nv_uv_step = 0x04040404U;
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NVToARGBRow_SVE2(src_y, src_vu, dst_argb, yuvconstants, width, nv_uv_start,
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nv_uv_step);
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uint32_t nv_u_start = 0xff01U;
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uint32_t nv_u_step = 0x0002U;
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uint32_t nv_v_start = 0xff00U;
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uint32_t nv_v_step = 0x0002U;
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uint64_t vl;
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asm("cntb %0" : "=r"(vl));
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int width_last_y = width & (vl - 1);
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int width_last_uv = width_last_y + (width_last_y & 1);
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asm volatile(
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"ptrue p0.b \n" //
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YUVTORGB_SVE_SETUP
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"dup z19.b, #255 \n" // A
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"index z7.h, %w[nv_u_start], %w[nv_u_step] \n"
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"index z23.h, %w[nv_v_start], %w[nv_v_step] \n"
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"subs %w[width], %w[width], %w[vl] \n"
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"b.lt 2f \n"
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// Run bulk of computation with an all-true predicate to avoid predicate
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// generation overhead.
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"ptrue p1.b \n"
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"ptrue p2.b \n"
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"1: \n" //
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READNV_SVE_2X NVTORGB_SVE_2X(t, b) RGBTOARGB8_SVE_2X
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"subs %w[width], %w[width], %w[vl] \n"
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"st4b {z16.b, z17.b, z18.b, z19.b}, p1, [%[dst_argb]] \n"
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"add %[dst_argb], %[dst_argb], %[vl], lsl #2 \n"
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"b.ge 1b \n"
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"2: \n"
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"adds %w[width], %w[width], %w[vl] \n"
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"b.eq 99f \n"
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// Calculate a predicate for the final iteration to deal with the tail.
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"whilelt p1.b, wzr, %w[width_last_y] \n"
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"whilelt p2.b, wzr, %w[width_last_uv] \n" //
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READNV_SVE_2X NVTORGB_SVE_2X(t, b) RGBTOARGB8_SVE_2X
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"st4b {z16.b, z17.b, z18.b, z19.b}, p1, [%[dst_argb]] \n"
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"99: \n"
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: [src_y] "+r"(src_y), // %[src_y]
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[src_uv] "+r"(src_vu), // %[src_vu]
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[dst_argb] "+r"(dst_argb), // %[dst_argb]
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[width] "+r"(width) // %[width]
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: [vl] "r"(vl), // %[vl]
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[kUVCoeff] "r"(&yuvconstants->kUVCoeff), // %[kUVCoeff]
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[kRGBCoeffBias] "r"(&yuvconstants->kRGBCoeffBias), // %[kRGBCoeffBias]
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[nv_u_start] "r"(nv_u_start), // %[nv_u_start]
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[nv_u_step] "r"(nv_u_step), // %[nv_u_step]
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[nv_v_start] "r"(nv_v_start), // %[nv_v_start]
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[nv_v_step] "r"(nv_v_step), // %[nv_v_step]
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[width_last_y] "r"(width_last_y), // %[width_last_y]
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[width_last_uv] "r"(width_last_uv) // %[width_last_uv]
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: "cc", "memory", YUVTORGB_SVE_REGS, "p2");
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}
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// Dot-product constants are stored as four-tuples with the two innermost
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