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libyuv/GEMINI.md
George Steed 26e56be0f9 GEMINI.md: Update Arm wording and guidance 
Update trademarks, document `arm_sve.h` and add guidance to prefer fully
predicated loop iterations for SVE/SME implementations.

Change-Id: I4039b982ba816193019df62a523fd29f474c3d10
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8256407
Reviewed-by: Wan-Teh Chang <wtc@google.com>
Reviewed-by: Frank Barchard <fbarchard@google.com>
2026-08-18 11:21:14 -07:00

3.1 KiB
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Gemini Project Context: libyuv Row Functions

This file provides context for the core row-processing architecture of libyuv. Use these guidelines when refactoring, reviewing, or generating code within the row_*.cc files.

Architectural Overview

Libyuv uses a dispatch system where high-level conversion functions call optimized "Row" functions. These functions are categorized by SIMD architecture and compiler compatibility.

Source File Map

x86 Architectures (32-bit and 64-bit)

  • row_gcc.cc: Master copy. Contains inline assembly in GCC syntax for GCC and Clang. Supports AVX, and AVX512. AVX512 implementations are strictly for 64-bit targets.
  • row_win.cc: Derivative of row_gcc.cc. Contains C++ intrinsics specifically for Visual C++ (MSVC). Can be tested with Clang using -DLIBYUV_ENABLE_ROWWIN.
  • Note: Use either row_gcc or row_win, never both.

Arm Architecture (32-bit)

  • row_neon.cc: 32-bit Arm. Written entirely in inline assembly for GCC/Clang.

Arm Architecture (AArch64) (64-bit)

  • row_neon64.cc: 64-bit Arm (AArch64) Neon. Written entirely in inline assembly for GCC/Clang.
  • row_sve.cc: Armv9 Scalable Vector Extension (SVE2).
  • row_sme.cc: Armv9 Scalable Matrix Extension (SME) and Streaming SVE (SSVE).
  • row_sve.h: Streaming-compatible implementations shared across row_sve.cc and row_sme.cc.

Other Architectures

  • row_rvv.cc: RISC-V Vector (RVV). Implemented using intrinsics. Optimized for SiFive X280.
  • row_lsx.cc / row_lasx.cc: Loongarch MIPS-like extensions.

Utility and Fallbacks

  • row_common.cc: Portable C/C++ versions. This is the reference implementation.
  • row_any.cc: Handles "remainder" pixels for widths not multiples of SIMD register size. Used for x86, Neon, and MIPS. Not required for SVE2, SME, or RVV due to hardware-level masking.

Coding Guidelines

  1. Feature Macros: Use the HAS_ macros in include/libyuv/row.h to enable or disable specific instruction set extensions.

x86 Architectures (32-bit and 64-bit)

  1. AVX512 Logic: AVX512 row functions are strictly enabled for 64-bit x86 only.
  2. MSVC Intrinsics (row_win.cc): When converting row_gcc.cc to row_win.cc, use _mm512_permutex2var_epi8, not _mm512_permi2var_epi8 intrinsic.

AArch64

  1. For SVE2/SME, aim to use full predicates (ptrue) and full vectors for the main loop body and use predication only to mask the tail loop as needed. Pointer updates should be done with inc[bhwd] or add, not by incp.

Changelist (CL) Format Guidelines

When adding new code, remove trailing spaces. When generating descriptions, follow the Chromium standard format. Wrap commit message text at 72 characters

Changelist (CL) Description Example

libyuv] Optimized ARGBToRGB24 for AVX2

Detailed technical explanation of the change. Describe the SIMD
optimization logic and any platform-specific constraints. Mention
if this impacts specific row files like row_gcc.cc.

Test: libyuv_unittest --gunit_filter=*ARGBToRGB24*
Bug: libyuv:12345, b/67890