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Frank Barchard 700f153cb8 [libyuv] Add Qualcomm Hexagon HVX SIMD support 
Implement Qualcomm Hexagon Vector Extensions (HVX) 128-byte SIMD
optimizations and runtime CPU detection for Hexagon DSP targets:
- CPU detection: Add kCpuHasHexagon and kCpuHasHVX flags,
  LIBYUV_DISABLE_HVX environment variable support, and Hexagon
  unit_test mmap/munmap shims.
- Rotate/Transpose (rotate_hvx.cc): Implement TransposeWxH_HVX,
  TransposeUVWxH_HVX, TransposeWxH_16_HVX, and TransposeWxH_32_HVX
  using power-of-2 vdeal/vshuff butterfly networks.
- Compare (compare_hvx.cc): Implement HammingDistance_HVX,
  SumSquareError_HVX, HashDjb2_HVX, and Ssim4x4Row_HVX.
- Scale (scale_hvx.cc): Implement 16 scale row kernels including
  ScaleAddRow_HVX, ScaleRowDown2*_HVX (8-bit and 16-bit),
  ScaleRowDown4*_HVX, ScaleARGBRowDown2*_HVX, and
  ScaleUVRowDown2*_HVX.
- Row functions (row_hvx.cc): Implement 58 row kernels covering
  copy/set/mirror, split/merge, 8/16-bit conversions, YUV-to-ARGB,
  ARGB-to-YUV, ARGB channel swizzles, blend, attenuate, and
  interpolate using hardware-predicated partial loads/stores.

R=rrwinterton@gmail.com

Bug: None
Test: libyuv_unittest on Hexagon v81 simulator and Snapdragon 8 Elite
Change-Id: Ib6713de51f6246d95e58c95e629ff03f18e3b91e
Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/8604586
Reviewed-by: richard winterton <rrwinterton@gmail.com>
2026-10-19 14:16:18 -07:00
..
compare_common.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
compare_gcc.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
compare_hvx.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
compare_neon64.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
compare_neon.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
compare_wasm.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
compare_win.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
compare.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
convert_argb.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
convert_from_argb.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
convert_from.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
convert_jpeg.cc [libyuv] Keep LIBYUV_API in basic_types.h and remove legacy types and bool macros 2026-08-28 08:32:19 -07:00
convert_to_argb.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
convert_to_i420.cc Add 25 native k-masked AVX-512 row kernels 2026-10-12 18:14:41 -07:00
convert.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
cpu_id.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
mjpeg_decoder.cc [libyuv] Fix RISC-V CMake/GN/Bazel builds and C compiler driver linking 2026-09-28 10:59:30 -07:00
mjpeg_validate.cc [libyuv] Keep LIBYUV_API in basic_types.h and remove legacy types and bool macros 2026-08-28 08:32:19 -07:00
planar_functions.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
rotate_any.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
rotate_argb.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
rotate_common.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_gcc.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_hvx.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
rotate_lasx.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
rotate_lsx.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
rotate_neon64.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_neon.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_rvv.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_sme.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_sve.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_wasm.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate_win.cc [libyuv] Optimize RotatePlane_16 SIMD and compact 32-bit transposes 2026-10-12 10:57:34 -07:00
rotate.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
row_any.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
row_common.cc clang format and bump version 2026-09-28 10:42:45 -07:00
row_gcc.cc Add 25 native k-masked AVX-512 row kernels 2026-10-12 18:14:41 -07:00
row_hvx.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
row_lasx.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
row_lsx.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
row_neon64.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
row_neon.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
row_rvv.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
row_sme.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
row_sve.cc [libyuv] Optimize CalcFrameSsim with 2-row 4x4 tile buffer and SIMD 2026-10-15 23:22:58 -07:00
row_wasm.cc [libyuv] AVX512, NEON, WASM and RVV alpha copy and mirror rows 2026-10-07 12:44:53 -07:00
row_win.cc Add 25 native k-masked AVX-512 row kernels 2026-10-12 18:14:41 -07:00
scale_any.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
scale_argb.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
scale_common.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
scale_gcc.cc Fix remaining inline asm input/output constraints and clobbers 2026-10-13 11:20:48 -07:00
scale_hvx.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
scale_lsx.cc [libyuv] Rewrite LoongArch LSX/LASX kernels in compact inline asm 2026-10-16 17:25:23 -07:00
scale_neon64.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
scale_neon.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
scale_rgb.cc Fix Coverity Control flow issues (DEADCODE) 2026-07-01 10:39:22 -07:00
scale_rvv.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
scale_sme.cc Fix missing inline asm register clobbers 2026-10-08 14:44:23 -07:00
scale_uv.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
scale_wasm.cc [libyuv] Add WASM SIMD128 compare, rotate, scale and row functions 2026-10-06 19:05:05 -07:00
scale_win.cc BGRAToI420 use BgraConstants for a direct conversion using AVX512BW 2026-06-08 12:21:47 -07:00
scale.cc [libyuv] Add Qualcomm Hexagon HVX SIMD support 2026-10-19 14:16:18 -07:00
test.sh Optimze ABGRToI420 for AVX2 2020-06-04 18:24:45 +00:00
video_common.cc Lint cleanup after C99 change CL 2018-01-24 19:16:03 +00:00